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Arria 10 LVDS Basic Design Examples

Arria 10 LVDS Basic Design Examples

Arria 10 LVDS SERDES with IOPLL location manually constrained design example

Overview

This basic design example demonstrates how to manually constrain the Arria 10 IOPLL location for LVDS SERDES using Assignment Editor. This would allow user to select the specific IOPLL for a LVDS channel in design. In this design, the IOPLL location has been pre-assigned. You can refer to the assignment example in the Assignment Editor.

To manually constrain the IOPLL location in the design, do the following steps:

1. Extract the project QAR 

2. Run Analysis & Synthesis compilation 

3. Open up RTL Viewer 

4. Look for the IOPLL primitive node 

5. Right click on the IOPLL primitive node and Locate Node in Assignment Editor 

6. Populate the node into the "To" column of Assignment Editor 

7. Select Assignment Name = Location 

8. At the "Value" column, look for Element = IOPLL and select the target IOPLL location 

9. Save and recompile the design 

10. Check the Fitter report -> PLL Usage Summary -> IOPLL for the location 

Design File

Arria 10 LVDS SERDES with IOPLL location manually constrained design example Q15.1 (QAR)

Design Specifications

The table below lists the specifications for this design:

AttributeSpecification
DeviceArria 10 GX
Quartus versionQuartus Prime v15.1
Datarate1Gbps
Number of channels1
IP usedAltera LVDS SERDES



Version history
Revision #:
1 of 1
Last update:
‎06-27-2019 11:43 AM
Updated by:
 
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