This wiki page has been created so that Quartus BluePrint Platform Designer users can use some example templates to begin their planning. The designs uploaded to this page complete the synthesis process allowing a user to go into BluePrint and verify their pinouts match the device selected very early in their design.
Two approaches can be used to bring in the BluePrint pinout locations into your design.
1. Export the pin constraints to a tcl file, bring up Quartus, and source the tcl file which will add all the constraints into the qsf file. This makes the qsf file very large in some cases.
2. Export the pin constraints to a tcl file, remove all lines from the beginning of the tcl file to and including the line that says "remove_all_instance_assignments -name LOCATION". Then, remove the last line "export_assignments" from the tcl file and save. In the qsf file, add the line "source <filename>.tcl" where <filename> is the name you gave the tcl file exported from BluePrint.
Most designs will contain black boxes that are setup as partitions set to "empty". The user side application connections or other non-pin related connections were brought to a black box setup as an empty partition so that the IP would not be synthesized away.
A10 SX 16.0 4DDR3x24 HPSDDR3x16 MISC IO.qar - See attached
A10 SX 16.0 2DDR3x72 HPSDDR3x40.qar - See attached
A10 SX 16.0 4DDR4x16 PCIe gen3x8.qar - See attached
A10 GX 16.0 8DDR4x16 48XCVR.qar - See attached
A10 GX 16.0 4DDR4x64 UDIMM.qar - See attached
A10 GX 16.0 16DDR4x8.qar - See attached