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CPRI v6 Build 15.1.313

CPRI v6 Build 15.1.313


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Migration Guide

If you are migrating from a previous release to the latest version, please refer to the link below:

Changelog

A) New features:

1) Enable CPRI Compression and De-Compression IP block. For further information please refer to CPRI Compression

B) Bug fixes:

1) Configurations 9.8304Gbps with MII interface may experience some packet loss.

2) Missing reconfig_clk and/or reconfig_reset signal in StratixV startup-sequence state machine enabled and line bit rate auto-negotiation enabled configurations.

3) Register ROUND_TRIP_DELAY bit[9:0] now upgraded to 20bits ROUND_TRIP_DELAY bit[19:0]

4) Malfuntion of Reversed Loopback feature (register 0x44 LOOPBACK bit[10:8]) for all configurations.

5) Malfunction of Forward Loopback feature (register 0x44 LOOPBACK bit[1:0] = 2'b10) for 10.1367Gbps and/or line bit rate auto-negotiation configurations.

6) Simulator VCS or NCSIM may halt compilation due to error related to "always_ff" syntax when Control Word access through management interface is enabled.

7) Removal of redundant clk ctrl block for static 10.1376Gbps or 8.11008Gbps that may cause warnings in TimeQuest

8) Update timing constraint (altera_cpri.sdc) that may causes warnings in TimeQuest

9) Customer demonstration testbench update - MII/GMII interface's may indicate false passed result when signal mii_rxer/gmii_rxer asserts.

C) Device updates:

1) Removal of Arria10 614.4Mbps Tx Simplex support in all production devices. Support is only available in engineering sample (ES/E2 revision) devices.

Errata

For existing bug/limitation in this build, please see this link.


Version history
Revision #:
1 of 1
Last update:
‎06-24-2019 11:40 PM
Updated by:
 
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