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DCFIFO with ALTECC Implementation Example Design

DCFIFO with ALTECC Implementation Example Design



Contents

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Overview

This design example uses an DCFIFO to illustrate how the ECC feature can be implemented external to the FIFO. The ALTECC_ENCODER and ALTECC_DECODER IP cores are required as the ALTECC_ENCODER IP core encodes the data input before writing the data into the DCFIFO, while the ALTECC_DECODER IP core decodes the data output from the DCFIFO before transferring the data out to other parts of the logic.

Download

The example design and the details description of the design can be downloaded from the following links.

File:DCFIFO ECC ExampleDesign.zip

File:DCFIFO with ALTECC Implementation Example Design.pdf

System Requirements

Quartus II version 14.1

Disclaimer

This design example describes how ECC features can be implemented with the DCFIFO using ALTECC. However, the design example might not represent the optimized design or implementation.


Version history
Last update:
‎06-25-2019 04:35 PM
Updated by:
Contributors