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DE1 board

DE1 board

Terasic DE1 Board Reference Designs

Reference designs below use VHDL. All designs below use the latest (12.0 suite) version of Quartus, ModelSim-Altera (starter-edition), Qsys and NIOS II SBT for Eclipse. Note that to use DSP Builder, you need Quartus subscription edition.

  1. Simple Arithmetic Logic Unit
  2. Square Root Computation (Floating-Point computation, Fixed-Point display)
  3. Recursive Realization of M-Bit 2^n-to-1 multiplexer
  4. Slide from presentation to Altera (courtesy of student Jake Nagel)
  5. Audio Codec Interface
  6. NIOS II Materials
  7. VGA Interface. This VGA interface has both a VHDL and a NIOS based design. The NIOS based design is more interesting since it demonstrates the Altera University Program Qsys cores and the use of a timer interrupt to display system up-time on a VGA monitor.
Version history
Last update:
‎06-25-2019 09:00 PM
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