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Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x72

Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x72



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Last Major Update

Initial Release - November 18th 2010 - SIII ALTMEMPHY RLDRAMII 300MHz, x72 interface (2 x36), QuartusII v8.1

Design Overview

This design has a x72 RLDRAM II controller running at 300MHz. This design is used to migrate an RLDRAMII design from a SII to a SIII device.

Design Specifications

Design files are located here

The table below lists the specifications for this design:  

AttributeSpecifcation
Quartus versionQuartusII v8.1
FPGAEP3SL150F1152
KitNA
Memory deviceRLDRAMII
Memory speed300MHz
Memory topologyTwo x36 devices
IP usedALTMEMPHY

 

Notes/Comments



Update History

  1. November 18th 2010 - SIII ALTMEMPHY RLDRAMII 300MHz, x72 interface (2 x36), QuartusII v8.1 

See Also

  1.   List of designs using Altera External Memory IP

 

External Links

  1. Altera's External Memory Interface Solutions Center
  2. Altera's External Memory Interface Handbook

 

Key Words

ALTMEMPHY, RLDRAMII, Design Example, External Memory, Stratix III, SIII

 

 

  

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Version history
Revision #:
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Last update:
‎06-27-2019 03:57 PM
Updated by:
 
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