Initial Release - November 11th 2010 - SIV ALTMEMPHY DDR3 400MHz, two x16 and one x32 shared interfaces, QuartusII v8.1
This design features 3 DDR3 controllers on the top edge (two x16 interfaces & one x32 interface) operating at 400-MHz/800-Mbps. This example design uses the ALTMEMPHY megafunction-based DDR3 SDRAM High Performance Controller MegaCore. In addition, one DLL & 3 static PLL clocks are shared across all controllers. This timing closed design can used as an example showing feasibility for 3 controllers on one side of device with DLL/PLL sharing. For more information, please refer to the Altera External Memory Interface Handbook.