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Design Example - SIV ALTMEMPHY DDR3 400MHz with debug toolkit

Design Example - SIV ALTMEMPHY DDR3 400MHz with debug toolkit



This design features a x64 DDR3 controller for the Stratix IV GX 230 development kit. The DDR3 controller is located on the bottom edge of the device and operates at 400MHz/800-Mbps. This example design uses the ALTMEMPHY megafunction-based DDR3 SDRAM high performance controller II MegaCore. In addition, it includes the integrated debug toolkit for analyzing calibration results. This timing closed design will help you learn how to implement and use the debug toolkit with ALTMEMPHY designs.

 

File:Ddr3.qar

Version history
Revision #:
1 of 1
Last update:
‎06-27-2019 04:11 PM
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