DisplayPort AUX Log Decoding Guideline

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DisplayPort AUX Log Decoding Guideline

This article provides you the guidance on how to decode AUX data traffic dump for Intel® FPGA DisplayPort example design:

Viewing AUX Data:

• AUX data transaction is viewable in Nios® II terminal
• Above is the alternative if user does not have Unigraf DPA-400 or other AUX monitor tools
• To monitor the AUX Data on the Nios II terminal, you must:
  • Enable BITEC_AUX_DEBUG in SW Config.h
  • Enable AUX Debug Stream in the DisplayPort IP Core Platform Designer for both source and sink

Decoding AUX Data:

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Aux Log Read Operation
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1. DP Tx (source) sends AUX_RD command
2. DP Rx (sink) responded with AUX_ACK command 

AUX_RD command:

AUX_RD @ <DPCD address> () 90 <DPCD address> <number of data bytes read>

Example of AUX_RD command:

AUX Read acknowledge (AUX_ACK) command:

AUX_ACK <00 = AUX_ACK> <read data value for each DPCD address location>

Example of AUX_ACK command:

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Aux Log Write Operation
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1. DP Tx (source) sends AUX_WR command to specify what value to write to certain DPCD address location
2. DP Rx (sink) responded with either AUX_ACK for successful write or AUX_NACK for failure write

AUX_WR command:

AUX_WR @ <DPCD address> (write operation description) 80 <DPCD address> <number of data bytes write> <write value>

Example of AUX_WR command:

 

Notices & Disclaimers 

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The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications.  Current characterized errata are available on request.​ 

2021-06-11
Deshi Lim
#iamintel