DisplayPort Design Example 15.1 (TX Only)

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DisplayPort Design Example 15.1 (TX Only)

Introduction

This document describes an example design that demonstrates Altera DisplayPort Source (TX) functions using a video loop-through system. DisplayPort is a next-generation video interface display technology. The Video Electronics Standards Association (VESA) developed the standard as an open digital communication interface for internal chip-to-chip and external box-to-box digital display connections such as:

• Interfaces within a PC or monitor

• Interfaces between a PC and monitor or projector

• Interfaces between a PC and TV

• Interfaces between a device (e.g. DVD player) and TV

DisplayPort uses packetized data transmission and embeds the clock signal in the serial data stream. It can transmit audio, video, or both simultaneously. It also includes a bidirectional, half-duplex auxiliary (AUX) channel for link and device management. The Hot Plug Detect (HPD) causes the DisplayPort source to initiate the link via AUX channel.

a/af/Monitor_pic.jpg ( Monitor pic.jpg - click here to view image )

This design example supports the following FPGA development boards and requires using a Bitec DisplayPort daughter card. 2K resolution examples are available for Cyclone V, Arria V, Stratix V, and Arria 10. 4K resolution examples are available for Arria V, Stratix V, and Arria 10. 

1/10/Boards.jpg ( Boards.jpg - click here to view image )

For more information, download the DisplayPort TX-Only Design Example User Guide below

Downloads

DisplayPort TX-Only Design Example User Guide

DisplayPort TX-Only Design Example for Arria V Starter Kit

4K Displayport TX-Only Design Example for Arria V Starter Kit

DisplayPort TX-Only Design Example for Cyclone V GT FPGA Development Kit

DisplayPort TX-Only Design Example for Stratix V GX FPGA Development Kit

4K DisplayPort TX-Only Design Example for Stratix V GX FPGA Development Kit

DisplayPort TX-Only Design Example for Arria 10 FPGA Development Board

4K DisplayPort TX-Only Design Example for Arria 10 FPGA Development Board