Become a system architect by creating an entire Nios II based processor system in 3 hours or less.
This lab is a great tool if you are new to developing embedded systems on FPGAs and explains not only the "how" but also the "why". The lab targets DE1 hardware but you dont need the hardware to build the lab, only to test it.
Designing the system with an explanation of design flow, requirements, and strategy
Setting up a Quartus II project
Building the SOPC System with SOPC Builder
Building the software application with the Nios II Embedded Design Suite
Lab validation to provide feedback on the usefulness of this lab