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FPGA Debugging Example with Sources, Probes, and Virtual JTAG

FPGA Debugging Example with Sources, Probes, and Virtual JTAG



Attached are two design examples showcasing the use of In-System Sources and Probes and the Virtual JTAG megafunction.


In-System Sources and Probes is a new feature introduced in Quartus II Version 7.1 that allows you an easy way to read and drive logic values into your design. The Virtual JTAG megafunction, released in Quartus II version 6.1, also allows you to use JTAG resources as a communication interface. It's a lower level control hook as compared to In-System Sources and Probes, but allows you tighter control of your design resources.


File: DC_FIFO.zip

File:DC_FIFO_VJI.zip


Also check out the design examples for In-System Sources and Probes on the web:

http://www.altera.com/support/examples/download/sourceprobe_DE_dynamic_pll.zip

Cheers,

FightingQuaker

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Last update:
‎06-26-2019 11:51 PM
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