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The purpose of this work is to provide an example implementation of an MPPT algorithm for Solar Inverters. This document also aims to demonstrate the value added by Altera FPGAs & DSP Builder Advanced Blockset when used for MPPT implementation.User Guide for Maximum Power Point Tracking (MPPT) using DSPBuilder Advanced

Our aim is to investigate the

  1. Performance of FPGAs in Perturb & Observe (P&O) based MPPT
  2. DSP Builder tool flow for designing MPPT algorithms inside a solar inverter system
  3. Resource usage for a Perturb & Observe (P&O) based MPPT

Solar Inverter & MPPT

A typical solar inverter system is shown below in Figure 1. In current systems, the various elements of the control block are implemented in microcontrollers and digital signal processors. In future systems, the complexity of these blocks is expected to increase. FPGAs can potentially offer a lot of performance for these control blocks due to their customization potential. FPGAs can provide high levels of flexibility when upgrading these control blocks. An FPGA-based control system can offer scalability through its ability to handle multi-channel control.

Figure 1 Typical Solar Inverter System- Image001.png

Maximum Power Point Tracking

As shown in Figure 1, MPPT Control and DC-DC Control work together with the DC-DC Converter circuit to produce the required DC voltage (Vdc) for the inverter stage. The maximum power point of the solar panel depends on the insolation. Insolation is a measure of solar radiation energy received on a given surface area and recorded during a given time. Since insolation varies over time, it is necessary for the DC-DC stage to track the maximum power point in order to increase the overall efficiency of the solar inverter[2]. Figure 2 shows the solar cell equivalent circuit.

Figure 2 Solar Cell Equivalent Circuit- Image002.png

The typical IV and power curves of a solar panel are shown in Figure 3. The optimized power can be extracted from the Solar Panel when dP/dV=0. This point is called the maximum power point. The variation of the output characteristic can be seen in Figure 3 below (right). It shows the output power at various solar radiation levels for a typical solar panel at 1000 W/m2, 800 W/m2 and 600 W/m2.

Figure 3 Solar Panel Voltage/Current (IV) Characteristic (left) & Power Characteristic (right)- IV_Graph.png ‎

Perturb & Observe MPPT Algorithm

[Need to explain what the reference current is (and reference voltage) and why we are choosing to control by adjusting the reference current].

The two common MPPT algorithms are the Incremental Conductance Algorithm (IncCond) and the Perturb and Observe Algorithm (P&O) [2]. IncCond offers better tracking of the maximum power point but it is more complex to implement. In the P&O method, the controller adjusts the reference current (Iref) and observes the effect on the power output. If the power output increases, the controller (MPPT algorithm) adjusts the reference current in the same direction. If the power output decreases, the controller changes the direction and observes the power output. This is repeated until the peak power point is detected. This is the most commonly used MPPT algorithm because it is easy to implement and has relatively good performance. Figure 4below shows a basic control flow for P&O-based MPPT.

Figure 4 P&O based MPPT algorithm- FlowChart.png

DSP Builder Implementation – P&O MPPT

This section describes the implementation of P&O using Altera’s DSP Builder Advanced Blockset. This section also describes the results (resource usage & latency) for the implementation on a Cyclone V device.

Test Setup

MATLAB© Simulink© coupled with Altera’s DSP Builder Advanced Blockset offers an excellent environment for design, simulation and implementation of hardware blocks. MATLAB© is widely used across industry and academia for research on algorithms for Solar Inverters. Some of the world-renowned Solar/PV Inverter research groups such as Fraunhofer ISE (Freiburg, Germany) and Florida Solar Energy Centre (University of Central Florida, USA) use MATLAB©extensively for their research in advanced algorithms for both the DC-DC and DC-AC stages [1].

In this implementation, the Solar Panel model is implemented using Simulink©. The Solar Panel model uses standard Simulink©components while the MPPT implementation uses Altera-specific components that are capable of generating optimized hardware implementation. The Solar Panel array in the test bench contains six Solar Panel modules, each rated at 85W. This configuration is shown in Figure 5 below.

Figure 5 Solar Panel Array with configurable insolation condition- Image006.png ‎

As shown in the figure, it is possible to choose between time-varying or constant insolation. One of the 6 panels, (Insolation 6) is further separated in order to demonstrate the effect of shading.

Figure 6 shows the various configurable parameters for a particular panel. The time-varying insolation can be configured using the Source Block (S1-Insolation1-5 & S6-Insolation 6). The configuration parameters offer 10 different values that are simulated over a 10 hour period. This could easily be modified to increase or decrease the amount of variation.

Figure 6 Solar Panel configuration options- Image007.png 

The mathematical model for these panels is identical. It takes in insolation and the reference current (feedback from MPPT) and computes the output voltage. The output voltages of all the panels are then added up to obtain the overall voltage (Vpv). This is then multiplied with Iref to obtain the current output power of the complete array (Ppv). The mathematical Simulink© model of the solar panel is shown below in Figure 7. This model is based on the Solar Panel simulations demonstrated by the Department of Electrical, Computer, and Energy Engineering at the University of Colorado in Boulder.

Figure 7 Simulink© Model of the Solar Panel Module- Image008.png 

The output consists of a MATLAB© Scope that plots the IV characteristic of the MPPT algorithm. The values plotted are Iref, Vpv and Ppv.

To test the hardware implementation of the P&O implementation, the output characteristics are compared with a golden reference generated using a software implantation of the P&O algorithm explained in the previous section. This implementation is shown below.

Figure 8 MATLAB© implementation of P&O- Image009.png

DSP Builder Advanced Model

The hardware implementation is generated using Altera’s DSP Builder Advanced Blockset. The DSP Builder Advanced Blockset uses highly optimized, device-specific implementations of various components such as adds, subtracts etc. The clock rate used for simulation is 100MHz. The target device chosen for hardware generation is a Cyclone V.

The DSP Builder Advanced implementation is shown in the figure below (Figure 9).

Figure 9 DSP Builder Advanced implementation of P&O- Image010.png

This implementation is functionally equivalent to the MATLAB© implementation of P&O. The output characteristics of the hardware implementation are compared to the output characteristics of the MATLAB© implementation. Example output characteristics are shown in Figure 10 below.

Figure 10 Output characteristics of the DSP Builder implementation of the P&O MPPT algorithm- Image010.png

These results are compared to the output of the software implementation (MATLAB©) of the P&O algorithm. The MATLAB© results are shown in Figure 11 below.

Figure 11 Output characteristics of the MATLAB© implementation of the P&O MPPT algorithm- Image011.png 

The settings used for this simulation are Irefmax = 5A, Irefmin = 0A & Idelta = 0.02A. The insolation settings for this simulation are:

Insolation 1-5 (over a 10 hour period): [0 200 400 850 950 1000 950 850 400 200 0]

Insolation 6 (over a 10 hour period): [0 200 400 0 950 1000 950 850 0 200 0]

Resource Usage & Latency

The DSP Builder Advanced implementation resulted in an end-to-end latency of 36 cycles. No folding (Folding Factor=1) was used for this implementation. The figure below (Figure 12) shows the overall resource usage (LUT4=LE) and also some of the components that take up the most resource. The overall resource usage is 1726 LE or 1726 LUT4. The single largest block in the design is the Select stage that does thresholding and saturation of Iref. This block consumes 254 LE.

Figure 12 Resource usage for P&O MPPT Algorithm- Image012.png

P&O MPPT Source package

The test setup and the P&O MPPT implementation are provided as a zip file along with this document. The file ( contains the following files:

  1. setup_mpptrack.m – MATLAB© file to initialize DSP Builder Advanced Blockset specific parameters
    1. mpptrack_param.endTime (default 60*10) should match with the sample set provided for insolation block (S1 & S2). For example, to simulate a 10 hour time period, the sample time should be 60*10 and should have 10 distinct values in S1 & S2.
    2. mpptrack_param.ClockRate (default 100 in MHz) should match the ‘clk’ parameter set in the DSP Builder Advanced top level clk module
  2. mpptrack.mdl – Simulink© model file that contains MPPT implementation along with the test bench. This implementation uses Altera DSP Builder Advanced Blockset

To use this implementation, we need MATLAB© and Simulink© (R2010b or above) and Altera Quartus II (12.0sp1) with DSP Builder Advanced Blockset.

DSP Builder Model (mpptrack.mdl)

The DSP Builder Model contains the test bench and P&O MPPT control algorithm. The top level view of this model file is shown in the figure below (Figure 13). The design can be run in two different modes,

  1. Simulation Mode: In this mode, the simulation runs as a sample based simulation. It is quite useful for developing and debugging the system. The simulation runs quite quickly (in under few seconds). To select this mode, set hardware generation ‘off’ in the Hardware Generation module (light blue block on the top left) and the Simulation Switch (dark blue block on the top right) to Sample Based.
    1. Hardware Generation Mode: In this mode, MATLAB© simulates every clock period (of the FPGA). In this mode, the hardware is generated and can be used along with Quartus. But this mode is quite slow. To select this mode, set hardware generation ’ on’ in the Hardware Generation module (light blue block on the top left) and the Simulation Switch (dark blue block on the top right) to Folded FPGA.

Figure 13 Top Level View of DSP Builder Model (mpptrack.mdl)- Image013.png 

The actual implementation of the P&O MPPT control algorithm can be found under the masked block dut (device under test). This is shown in the model browser snapshot shown in the figure below (Figure 14).

Figure 14 Device Under Test (dut) - P&O MPPT Control Algorithm- Image014.png ‎

The parameters for the control are shown in the figure below (Figure 15). The parameters available for this control algorithm are

  1. Upper Limit for the reference current (Irefmax)
    1. Lower Limit for the reference current (Irefmin)
    2. Reference current increment value (Idelta)

Figure 15 Parameters for P&O Control Algorithm- Image015.png


In general, a conventional microprocessor/DSP (e.g. TMS320C25) is capable of performing only a single channel MPPT at any given time. In FPGA implementations, however, multiple copies of the MPPT algorithm can be running simultaneously, allowing multiple channels to be easily handled with a single device. This greatly simplifies communication and drastically reduces part counts.

Though common MPPT algorithms do not need high computation capabilities, specialized MPPT algorithms might be difficult to achieve using traditional DSPs. For example, Shade-Tolerant Maximum Power Point Tracking uses advanced algorithms to sweep for both local maxima and global maxima in a short time span [3]. This approach might require higher computation power.


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