This design interfaces to a CPRI backplane that attaches several different cards to the R/F modem: Both resource utilization and frequency of 245MHz were input into the Arria V PowerPlay Early Power Estimator. Design specifications for this Arria V FPGA implementation are as follows:
Resource utilization used in the Arria V PowerPlay Early Power Estimator
154 K LUTs
12 blocks in 18bit full precision
4 channels at 3 Gbps 3 channels at 6 Gbps 4 channels at 4 Gbps
This Microwave backhaul FPGA is the uplink path between the different packet processing blocks (Ethernet, E1/T1, and TDM) and the microwave radio. In our example, we’ve opted to show our worst case power by forcing the junction temperature to 85C, the maximum allowed in the Commercial speed grade without any airflow or heatsink. This is common in microwave backhaul because they are often situated in outdoor environments without cooling.