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Microwave Backhaul

Microwave Backhaul



This design interfaces to a CPRI backplane that attaches several different cards to the R/F modem: Both resource utilization and frequency of 245MHz were input into the Arria V PowerPlay Early Power Estimator. Design specifications for this Arria V FPGA implementation are as follows:

Resource utilization used in the Arria V PowerPlay Early Power Estimator


Resource TypeApproximate Count
Logic154 K LUTs
Flip Flops129 K
Memory9 Mbits
DSP Blocks12 blocks in 18bit full precision
IO240 IO
Transceivers4 channels at 3 Gbps
3 channels at 6 Gbps
4 channels at 4 Gbps



This Microwave backhaul FPGA is the uplink path between the different packet processing blocks (Ethernet, E1/T1, and TDM) and the microwave radio. In our example, we’ve opted to show our worst case power by forcing the junction temperature to 85C, the maximum allowed in the Commercial speed grade without any airflow or heatsink. This is common in microwave backhaul because they are often situated in outdoor environments without cooling.


File:ArriaV EPE Examples.zip and try out the changes for yourself!

Enter to win an Arria V FPGA Development Kit by submitting your Arria V PowerPlay Early Power Estimator!

Version history
Revision #:
1 of 1
Last update:
‎06-25-2019 05:06 PM
Updated by:
 
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