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Migration from SDI to SDI II

Migration from SDI to SDI II



 

Steps of Migration from SDI to SDI II

  1. Compare and understand the signals in between SDI IP core and SDI II IP core.
  2. Generate the SDI II IP core.
  3. Reconnect the all the signals as in SDI to SDI II.
  4. Implement the differences in between SDI and SDI II in the comparison.
  5. Compile and program the design.

 

SDI Tx Migration

SDI Tx Signal Comparison
SDI SignalSDI II SignalDirectionDescription
rst_txtx_rstInput

No change except for naming for some signals

phy_mgmt_clk_resetphy_mgmt_clk_rstInput
phy_mgmt_clkphy_mgmt_clkInput
tx_serial_refclkxcvr_refclkInput
txdatatx_datainInput
enable_crctx_enable_crcInput
enable_lntx_enable_lnInput
tx_stdtx_stdInput
tx_trstx_trsInput
sdi_txsdi_txOutput
tx_lntx_ln, tx_ln_bInput
gxb_tx_clkouttx_clkoutOutput
sdi_reconfig_togxbreconfig_to_xcvrInput
sdi_reconfig_fromgxbreconfig_from_xcvrOutput
tx_statustx_pll_lockedOutput
tx_pclktx_pclkInput

SDI: 27MHz(SD), 74.25MHz(HD), 148.5MHz(3G)

SDI II: 148.5MHz (SD, HD, 3G)

tx_datain_validInputNew.  Driven by tx_dataout_valid
tx_dataout_validOutputNew
tx_vpid_overwriteInput

New feature - Insert Video Payload ID (SMPTE 352M)

tx_vpid_byte1Input
tx_vpid_byte2Input
tx_vpid_byte3Input
tx_vpid_byte4Input
tx_vpid_byte1_bInput
tx_vpid_byte2_bInput
tx_vpid_byte3_bInput
tx_vpid_byte4_bInput
tx_line_f0Input
tx_line_f1Input



 

 

 

 

 

 





















































Sdi_tx.png (Click here for image)


The differences in between SDI and SDI II Tx implementation

  • Connect signal tx_dataout_valid to signal tx_datain_valid.
  • Connect signal tx_clkout to signal tx_pclk.

SDI Rx Migration


SDI Rx Signal Comparison
SDI SignalSDI II SIgnalDirectionDescription
rst_rxrx_rstInputNo change except for naming of some signals
phy_mgmt_clk_resetphy_mgmt_clk_rstInput
phy_mgmt_clkphy_mgmt_clkInput
rx_serial_refclkxcvr_refclkInput
sdi_rxsdi_rxInput
rx_clkrx_clkoutOutput
rx_data_valid_outrx_dataout_validOutput
rx_datarx_dataoutOutput
rx_Frx_fOutput
rx_Vrx_vOutput
rx_Hrx_hOutput
rx_APrx_apOutput
rx_eavrx_eavOutput
rx_trsrx_trsOutput
rx_stdrx_stdOutput
crc_error_yrx_crc_error_y, rx_crc_error_y_bOutput
crc_error_crx_crc_error_c, rx_crc_error_c_bOutput
rx_lnrx_ln, rx_ln_bOutput
sdi_start_reconfigrx_sdi_start_reconfigOutput
sdi_reconfig_donerx_sdi_reconfig_doneInput
sdi_reconfig_togxbreconfig_to_xcvrInput
sdi_reconfig_fromgxbreconfig_from_xcvrOutput
rx_video_formatrx_formatOutputRefer to User Guide explanation
refclk_raterx_coreclk_is_ntsc_palnInput

refclk_rate:

"0" for a 148.35MHz rx_coreclk

"1" for a 148.5MHz rx_coreclk

rx_coreclk_is_ntsc_paln:

"0" for a 148.5MHz rx_coreclk
"1" for a 148.35MHz rx_coreclk

rx_statusrx_pll_locked, rx_align_locked, rx_trs_locked, rx_frame_lockedOutputExtracted from rx_status[0], [2], [3], [4]
rx_rst_proto_outOutputReset the user receiver downstream logic and receiver protocol block
rx_clkout_is_ntsc_palnOutput

Indicate incoming SDI signal

"0" = PAL rate, 1/1.000 data rate factor

"1" = NTSC rate, 1/1.001 data rate factor

rx_coreclkInputConnected to reference clock frequency.
rx_vpid_byte1Output

New feature - Extract Video Payload ID (SMPTE 352M)

rx_vpid_byte2Output
rx_vpid_byte3Output
rx_vpid_byte4Output
rx_vpid_byte1_bOutput
rx_vpid_byte2_bOutput
rx_vpid_byte3_bOutput
rx_vpid_byte4_bOutput
rx_vpid_validOutput
rx_vpid_checksum_error, rx_vpid_checksum_error_bOutput
rx_line_f0Output
rx_line_f1Output
rx_clkin_smpte372Input

New feature - Convert level B to level A (SMPTE 372M)

rx_dataout_bOutput
rx_dataout_valid_bOutput
enable_sd_searchInput

Not available in Quartus version 12.1

enable_hd_searchInput
enable_3g_searchInput
rx_anc_dataOutput
rx_anc_validOutput
rx_anc_errorOutput
en_sync_switchInput
rx_xyzOutput
xyz_validOutput
rx_std_flag_hd_sdnOutput



Sdi_rx.png (Click here for image)



The differences in between SDI and SDI II Rx implementation

  • Connect the correct clock frequency into signal rx_coreclk which is same as clock frequency to signal xcvr_refclk.
  • Ensure signal rx_core_is_ntsc_paln is connected to the correct value.
  • Ensure signal rx_status from SDI is connected correctly into the extraction signals in SDI II (signal rx_pll_locked, rx_aligh_locked, rx_trs_locked, and rx_frame_locked.)
  • Signal rx_format indicated the received signal format differently with signal rx_video_format from SDI. Please refer to the SDI II User Guide detail explanation.



Link to the SDI and SDI II User Guide



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