This design utilizes the Modular SGDMA design exampleto implement frame buffering using an Avalon ST based video pipeline. Using the park feature of the descriptor frames are committed to the SGDMA and the hardware handles redisplaying the same frame if no other frames are present. You can use this hardware to display single frames or full motion video with additional video rendering software and hardware.
This design contains the following components:
Nios II 'f' core
PLL (video clock)
High Performance DDR SDRAM Controller
Video streaming pipeline
This design requires:
Quartus II version 9.1
Nios II Embedded Evaluation Kit, Cyclone III Edition (NEEK)
The hardware has already been compiled for your convenience, if you wish to recompile the hardware then you must regenerate the system in SOPC Builder. Navigate to the following location using the Nios II command shell:
From there you can run the script called 'batch_script.sh' by typing the following:
The script will generate make files for the application and bsp, compile the software, download the hardware and software to the board, and open a terminal.
After the hardware and software has been downloaded to the board you should see a red frame being displayed on the LCD. Pushing the button labled 'BUTTON1' will cause the software to progress to displaying green frame and if pressed again a blue frame will be displayed. This sequence will repeat as there are only three frames rendered and stored in the frame buffer memory.