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Nios II UDP Offload Example

Nios II UDP Offload Example

Last Updated: July 4, 2009

This example demonstrates a method of offloading UDP packet traffic from a Nios II system such that it can be processed in hardware rather than in software. This system implements a collection of hardware components that can be programmed by Nios II to selectively redirect UDP packets received over the Altera TSE MAC into a hardware processing data path. All other network traffic is routed into the Nios II subsystem like it would normally be received. The example also implements hardware components capable of creating UDP packets and multiplexing them together with Nios II subsystem traffic for transmission out the Altera TSE MAC interface.

Description

This example uses a Nios II subsystem running the InterNiche TCP/IP stack to setup and tear down high speed UDP packet streams which are processed in hardware. The hardware UDP data streams are transmitted and received over the Altera TSE MAC at the maximum data rate achievable over the GbE network, this is over 1.48 million packets per second for minimum sized Ethernet packets and over 81.27 thousand packets per second for maximum sized Ethernet packets.

This example is currently implemented to run on the Altera 2SGX90 PCIe development board and the Altera 3C120 development board. Two development boards can be connected together back to back over an Ethernet crossover cable, or the two boards can be connected thru a GbE switch.

This diagram from the provided documentation illustrates the concept that is implemented in the design example. All of the hardware and software source code is provided in the example archive.

 

UDP_Packet_Offload_jpg.jpg (Click here for image)

 

Contents

This example has been ported to two different Altera development boards, the 3C120 board and the 2SGX90 board. The example is published in a few different forms which are useful for different needs of the user.

3C120 port

There is a minimal source archive if you are interested in seeing the source code for the hardware design and the software application that runs on it.

There is also an executable binary archive available which you can extract and run immediately on a 3C120 development board.

There is a flash programming archive that provides scripts that program the hardware configuration image and software application into the CFI flash of the 3C120 board so they will execute upon power up of the development board.

There is a PDF document that was created to explain how the demo is setup and executed. This document was originally created for the 2SGX90 development board, but aside from the pictures, the technical content applies directly to the 3C120 version as well.

§ 20090703_udp_offload_example_3c120_src_90sp2.tgz - the example source archive

§ 20090703_udp_offload_example_3c120_exec_90sp2.tgz - the binary executable archive

§ 20090703_udp_offload_example_3c120_flash_90sp2.tgz - the flash programming archive

§ UDP Packet Offload.pdf - some technical discussion about the UDP Offload example

 

Update to version 12.1sp1. This is not tested! Simply ported and compiled successfully and placed here in case anyone wants to run with it.

§ Udp_offload_example_3c120_src_12.1sp1.qar - Quartus archive

 

2SGX90 port

There is a minimal source archive if you are interested in seeing the source code for the hardware design and the software application that runs on it.

There is also an executable binary archive available which you can extract and run immediately on a 2SGX90 development board.

There is a flash programming archive that provides scripts that program the hardware configuration image and software application into the CFI flash of the 2SGX90 board so they will execute upon power up of the development board.

 

There is a PDF document that was created to explain how the demo is setup and executed.

§ 20090704_udp_offload_example_2SGX90_src_90sp2.tgz - the example source archive

§ 20090704_udp_offload_example_2SGX90_exec_90sp2.tgz - the binary executable archive

§ 20090704_udp_offload_example_2SGX90_flash_90sp2.tgz - the flash programming archive

§ UDP Packet Offload.pdf - some technical discussion about the UDP Offload example

 

Downloading the example

Download the archives you are interested in and place them in a directory on your system that does not include spaces in the path name. The entire path name of this directory must not contain spaces, so on Windows systems you should avoid putting these in the "My Documents" folder, or on your "Desktop" since these locations are subdirectories of the "Documents and Settings" path, and that would mean that these locations inherit the spaces in that part of the path name.

In order to extract the archives after downloading them, it is recommended that you run the "tar -xzf <filename>" command from a bash shell. For linux users you should have ready access to a bash shell. For Windows users, you may need to install the Altera development tools to gain access to a bash shell. On Windows it is recommended that you install the Altera Quartus II FPGA development tools along with the IP base suite as well as the Nios II EDS development tools. Once these tool chains are properly installed on your workstation, you can launch a bash shell by running:

"Start -> Programs -> Altera -> Nios II EDS 9.0 -> Nios II 9.0 Command Shell"

Once you are in the bash shell, you can "cd" into the directory containing the archives that you've downloaded, and running the following commands to extract them:

tar -xzf <archive_filename>

Note that if you use some other archiving software to extract these archives, like WinZip, you may loose the execution privileges on some of the shell scripts within the archives that are used to perform various activities associated with building and using the example. If this happens, you can restore execute privileges from within a bash shell with the command "chmod +x <filename>". It is recommended that you avoid this situation by using "tar" to extract the archives from within a bash shell and avoid using any Windows oriented archive utilities with these archives.

Using the examples

After you have extracted the archive you should be able to locate a "readme.txt" within the archive directory that will give you some guidance on how to get started with that particular archive. The readme.txt should be right at the top level of the archive.

Requirements

The current version of this example has been tested under the 9.0 SP2 release of the Altera development tools. You should have Quartus II, the IP base suite and the Nios II EDS tools installed on your workstation.

2SGX90 port

This example design is built to run on the standard 2SGX90 development board which currently goes by the name:

PCI Express Development Kit, Stratix II GX Edition

3C120 port

This example design is built to run on the Altera 3C120 development board. This board is currently available in many different bundled packages today that go by these names:

  • Cyclone III FPGA Development Kit
  • DSP Development Kit, Cyclone III Edition
  • Embedded Systems Development Kit, Cyclone III Edition

Any one of the above development kits should contain the 3C120 base board that this example design is intended to run on.

Ethernet connection

Please note that if you are using a 3C120 board configuration that provides multiple Ethernet connectors, this example is created to use the Ethernet connector on the main base board, the board with the 3C120 device mounted on it. Do not connect the Ethernet cable to ports that extend off the HSMC connectors.

See Also

The Simple Socket Server Plus example, an example of how to use the various InterNiche provided services in an RTOS environment.

The Superloop Simple Socket Server Plus example, an example of how to use the various InterNiche provided

services in an non-RTOS environment.

User-friendly representation of the SOPC-builder system implemented in this project:

 

UDP_SOPC.png (Click here for image)

 

Update History

  • 20090704 – Posted a 3C120 version of the example built on the 9.0sp2 tools as well as an updated version of the 2SGX90 version of the example built on the 9.0sp2 tools.
  • 200806 – Initial posting with 2SGX90 build for 8.0 tools followed shortly by an 8.1 tools release.

Outdated Releases

2SGX90 releases from 2008

8.1 tools release

§ udp_offload_example_2sgx90_src_81.tar.gz - minimal source

§ udp_offload_example_2sgx90_full_81.tar.gz - full project

§ udp_offload_example_2sgx90_exec_81.tar.gz - binary executable images

§ udp_offload_example_2sgx90_flash_81.tar.gz - flash programming images

8.0 tools release

§ udp_offload_example_2sgx90_src_80.tar.gz - minimal source

§ udp_offload_example_2sgx90_full_80.tar.gz - full project

§ udp_offload_example_2sgx90_exec_80.tar.gz - binary executable images

§ udp_offload_example_2sgx90_flash_80.tar.gz - flash programming images

 

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