Success! Subscription added.
Success! Subscription removed.
Sorry, you must verify to complete this action. Please click the verification link in your email. You may re-send via your
When a card is inserted into a PCI, PCI-X, or PCI Express bus configuration is done by reading and writing into the configuration space.
Header & Capability Register Sets
1. We look at address 34h and see the address of the next capability register set (50h).
Start.jpg (Click here for image)
2. We jump to 50h and see a capability ID of 05h (MSI Capability Structure). We look at the next capability pointer in 51h to find which address to jump to next (78h).
Msi.jpg (Click here for image)
3. We jump to 78h and see a capability ID of 01h (Power Management Capability Structure). We look at the next capability pointer in 79h to find which address to jump to the next (80h).
Pm.jpg (Click here for image)
4. We jump to 80h and see a capability ID of 10h (PCI Express Capability Structure). We see 00h as the next capability pointer in 81h signifying the end of the linked list.
Pcie.jpg (Click here for image)
1. Initial Release - December 27 2012
PCI, PCI-X, PCIe, PCI Express, Configuration Space, Linked List
© 2010 Altera Corporation. The material in this wiki page or document is provided AS-IS and is not
supported by Altera Corporation. Use the material in this document at your own risk; it might be, for example, objectionable,
misleading or inaccurate.Retrieved from http://www.alterawiki.com/wiki/Altera_Wiki
For more complete information about compiler optimizations, see our Optimization Notice.