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PCI SIG Gen3 x8 Merged Design - Stratix V

PCI SIG Gen3 x8 Merged Design - Stratix V

Overview

The purpose of this page is to provide a link for the Stratix V PCI Express Gen3 x8 Merged Design. The design combines multiple designs required for the PCI SIG Gen3 compliance testing. 


For Gen2 x8 Merged Design, please click link below

  1. REDIRECT PCI SIG Gen2 x8 Merged Design - Stratix V

Features

  • All in one Stratix V Gen3 x8 design for the PCI SIG compliance testing
  1. 14.1 design passed through the preliminary PCI SIG compliance testing ( Inter-op test, Configuration test and basic transmitter test) .
  2. For full compliance tested design, please refer to 13.1 design
  • Targets the Stratix V GX Development Kit
  • Based on the Stratix V Gen3 x8 Avalon-ST 256-bit Design

Requirements

  • ACDS 14.1
  • Altera PCI Express Stratix V GX Development Kit
  • Refer to the attached User Guide for additional software and hardware requirements

Link to User Guide and Project Archive

User Guide

Refer to the link below for guidelines on using the Merged Design

File:StratixVGen3MergedDesignforPCI-SIG.pdf

Project Archive

Refer to the link below for the project archive for the design

File:StratixVGen3MergedDesignforPCI-SIG.qar

Version history
Revision #:
1 of 1
Last update:
‎06-26-2019 05:55 PM
Updated by:
 
Contributors