The attached reference design has been tested in multiple Linux platform with different chipsets.
64-bit Windows 7
The Linux OS includes
32-bit and 64-bit CentOS 6.4 and 6.5 with Kernel version 2.6.32 - 431
The chipset include
PCIe Gen3 Sandybridge
PCIe Gen3 Ivybridge
Since the design is still preliminary version, so it has some limitations
The performance number highly depends on the system it is testing with. The limitation is not due to the DMA engine or the PCIe HIP, it depends on how fast the root complex returns the data to the DMA. Hence, you may not be able to get the performance number listed above.
The QSYS file in the reference design below can't generate the simulation testbench. If simulation is needed, please contact factory.
Link to the software and reference design
Gen3 x8 256-bit Design
This revision has been obsoleted, please use next revision (revision 2) instead.
This revision has the following improvement when compared with revision 1
It improves the performance for small transfer size, such as 64-byte transfer for each descriptor
The application uses randomized data instead of incremental
The application provides infinite loop for user
This revision has been obsoleted, please use next revision (revision 3) instead.
This revision has the following improvements when compared with revision 2 above
Supports out of ordered completions
Supports 1 DW transfer size of a descriptor
Increases the on-chip memory size to 64KB
The application supports the transfer size up to 1MB
The application supports different number of descriptors, from 1 to 128
To generate and compile the IP in ACDS 13.1 or later version, please do the following steps
The use of the material on this page is governed by, and subject to, the terms and conditions of the Altera Program License Subscription Agreement, the Altera MegaCore Function License Terms and Conditions, and the Altera Hardware Reference Design License Agreement respectively.