Running DDR3 Memory Test with NIOSIQuartus II v16.0
MAX 10 FPGA Development Kit
As MAX 10 DDR3 UniPHY controller is not support EMIF toolkit. This wiki link is introduced to demonstrate how to run memory test on particular memory address using NIOS II eclipse memory test template. The purpose of this design example is to ease user to determine which memory address is fail on DDR3 read/write transaction.
Running the memory test
1) Run full compilation on testddr3_nios_ddr3.qar with Quartus 16.0
2) Launch Quartus Programmer and program testddr3.sof to the MAX 10 FPGA Development Kit
3) Launch NIOS II 16.0 Software Build Tools for Eclipse
4) Go to File Tab and click NIOS II Application and BSP from Template