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Implementation of Arria 10 ES3 Triple Rate SDI II TX Refclk Switching Feature
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Triple-rate SDI II Reference Design for Stratix V, Arria V & Cyclone V devices
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Triple-Rate SDI II Simple Design
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Triple Rate SDI II Implementing Tx PLL Dynamic Switching Feature for Arria V Device
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CVO_IP_video_mode_detection_and_switching_feature
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Triple Rate SDI II Quad Instance Simulation/Compilation Design Example
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SDI Automated Switching Module
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FTA Arria 10 SDI II TX and RX Issue Isolation
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SDI II MegaCore Debug Checklist
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Triple-rate SDI Reference Design for Cyclone V devices
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Triple Rate SDI Implementing Tx Mux Feature for Stratix IV Device
This reference design demonstrates the SDI-ASI auto protocol detector based on the combination of the current Altera SDI and ASI MegaCore® functions,and shows how to demonstrate the SDI-ASI combo block with the Stratix® IV GX
Stratix IV GX audio video development board.
The SDI-ASI_combo TX is able to transmit SD, HD, 3G and ASI video signal.
The SDI-ASI_combo RX is able to receive SD, HD, 3G and ASI video signal.
Software requirement: Quartus II 12.0 sp1 or later Quartus Version with using the SDI lib attached in this project.
Hardware Requirement : Stratix IV GX FPGA development board and SDI HSMC
Reference Note: SDI-ASI Auto Detect Reference Design for Stratix IV GX Devices
Download : s4gx_sdi_sdi_asi_combo.qar
readme: S4gx_sdi_asi_combo_Readme.txt
The reference design demonstrates how SDI can be implemented in PMA DIRECT Mode, which able to be fit at regular transceiver channel and CMU channel. There are total of 6 SDI in PMA DIRECT Mode successfully fit in this reference design.
Software requirement : Quartus II 10.0 sp1 or later Quartus Version with using the SDI lib attached in this project.
Hardware Requirement : Audio Video Development Kit, Stratix IV GX Edition Stratix IV GX FPGA development board and SDI HSMC
Reference Application Note: Refer to AN 600: Serial Digital Interface Reference Design for Stratix IV Devices
Parameter:
The parameters °ENABLE_DUPLEX_PMA_DIRECT" is only supported in this Lib.
This parameter is not exist if you are instantiating a new SDI Duplex Instance.
sdi_megacore_top_inst.ENABLE_DUPLEX_PMA_DIRECT = 1'b1, // Support for PMA DIrect
sdi_megacore_top_inst.ENABLE_DUPLEX_PMA_DIRECT = 1'b0, // Support for Regular Transceiver Channel
Starting Channel Number:
The starting channel number for each instance is incremented by factor 8, eg: 0,8,16,24,32,40
Limitation of this reference design:
-Only Support for SDI Duplex Instance
-Fitting Test is only done for one transceiver quad, as shown in this reference design.
-Limited Test.
Only SDI Channel 0 and Channel 1 on the design are completely tested. The behaviour of SDI in PMA Direct Mode can be demonstrated through the 2 channels of HSMC daughter card.
SDI Channel 2 to Channel 5 are designed for fitting test, to show that SDI in PMA Direct Mode can be fitted in 4 regular channels and 2 CMU Channel in the same Quad. Due to hardware limitation, not all transceiver quads can fully fit this design.
Download : s4gx_sdi_pma_direct
readme : s4gx_sdi_pma_direct Readme.txt
The reference design demonstrates SDI Flywheel Video Decoder reference design based on current Altera SDI MegaCore Function.
Software requirement : Quartus II 9.1 or later Quartus Version with using the SDI lib attached in this project.
Hardware Requirement : Stratix II GX Audio Video development board
Guide : SDI_Flywheel_Video_Decoder.pdf
Design File : SDI_Flywheel_Video_Decoder.qar
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