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Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design

Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design

 

 Application Note

Please refer to AN647 - Single Port TSE and On-Board PHY Chip Reference Design on Intel.com

Download Reference Designs

Triple Speed Ethernet reference design for Arria II GX Development Kit

 AN647_TSE_Single_Port_RGMI_Dev_AIIGX_ACDS-12.0sp2.qar

Triple Speed Ethernet reference design for Arria V GX Start Kit 

  • RGMII interface

 AN647_TSE_Single_Port_RGMII_Starter_AVGX_ACDS-12.0sp2.qar

  • SGMII interface

 

AN647_TSE_Single_Port_SGMII_Starter_AVGX_ACDS-12.0sp2.qar

Triple Speed Ethernet reference design for Stratix IV GX Development Kit

AN647_TSE_Single_Port_SGMII_Dev_SIVGX_ACDS-12.0sp2.qar

Triple Speed Ethernet reference design for Stratix V GX Development Kit

AN647_TSE_Single_Port_SGMII_Dev_SVGX_ACDS-12.0sp2.qar

 

Notes

Qsys need to be generated before compiling the project.

Version history
Revision #:
2 of 2
Last update:
‎07-06-2021 02:30 PM
Updated by: