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Triple Speed Ethernet Hardware Tested Designs

Triple Speed Ethernet Hardware Tested Designs



1000BASE-X PCS only with GXB for Altera Cyclone V GT FPGA Develpment Kit

Quartus Prime Software version 15.1.2

Full automated register setting sequence by a state machine

2 channel TSE instances to enable Auto-Negotiation testing

Frequency counters to validate sourced and generated clocks

ModelSim testbench avaliable

RTL View Top 20160623.pdf

Design File SGMII top


Version history
Last update:
‎08-25-2020 09:19 AM
Updated by: