This design interfaces to a SRIO backplane that attaches several different baseband processing cards together. Its designed to convert the signals from a remote radio head into digital signals to be transmitted through the cellular backhaul: f/f7/Wireless.JPG
Both resource utilization and frequency of 245MHz were input into the Arria V PowerPlay Early Power Estimator. Design specifications for this Arria V FPGA implementation are as follows:
260 K LUTs
100 blocks in 18bit full precision
20 SRIO 1 PCIe 2 CPRI
This wireless baseband system would actually sit in a rack, and therefore, a Commercial temperature grade would be the correct temperature grade to estimate power consumption. In our example, we’ve opted to show our worst case power by forcing the junction temperature to 85C, the maximum allowed in the Commercial speed grade without any airflow or heatsink. In reality, this design would have at least airflow for active cooling and possibly even a heatsink. Changing these operating conditions usually impacts the total power consumption.