FPGA

Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

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Intel® SoC FPGA Embedded Development Suite

Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems

3026 Mensajes publicados

Intel® Quartus® Prime Software

Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

86554 Mensajes publicados

Intel® High Level Design

Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™

3952 Mensajes publicados

Intel® FPGA Software Installation & Licensing

Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.

6612 Mensajes publicados

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How could I understand “IOPLL could drive the lvds tx transmitter in adjacent bank"

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qspi driver in NIOS bsp in Cyclone 10

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How can you create a .vqm file or equivalent in Quartus Prime Standard 23.1?

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	Assistance Required: Persistent Oscillation Issues on MAX10 LVDS Receiver Inputs por Sungjin Principiante en Programmable Devices 06-16-2025 0 6	0	6
	EMIF Location constraint error por mjuneja2007 Novato en FPGA, SoC, And CPLD Boards And Kits 06-16-2025 0 1	0	1
	How to Modify Intel EMIF IP for STT-MRAM Support Similar to Xilinx MIG Patch Mechanism? por Cleveland Principiante en Intel® Quartus® Prime Software 06-16-2025 0 2	0	2
	Failed to launch NIOSV Command Shell. Getting (0xc0000142) application error. por prashant_gohel Novato en Nios® V/II Embedded Design Suite (EDS) 06-16-2025 0 13	0	13
	mouse error in using signalTap por chalieRobert Principiante en FPGA, SoC, And CPLD Boards And Kits 06-16-2025 0 13	0	13
	Trying to understand on-chip memory por BobA Principiante en Intel® Quartus® Prime Software 06-15-2025 0 1	0	1
	Quartus Prime Lite cannot find Board files por Interpara Principiante en Intel® Quartus® Prime Software 06-15-2025 0 11	0	11
	DE2-35 send .hex image to PC through USB port por tuanquang97 Principiante en Intel® SoC FPGA Embedded Development Suite 06-15-2025 0 3	0	3
	Questa does not run on Redhat 8.7 in a virtual machine por eeleigh Novato en Intel® Quartus® Prime Software 06-15-2025 0 14	0	14
	PCIe design reference recommendation (Cyclone 10 GX) por Derek_Teng Nueva usuaria en FPGA Intellectual Property 06-15-2025 0 0	0	0
	Agilex board POF file programming - causing lspci enumeration problem por mjuneja2007 Novato en FPGA, SoC, And CPLD Boards And Kits 06-15-2025 0 2	0	2
	Modular approach for the NIOS ii processor intigration with main FPGA file por Noman3 Novato en Intel® High Level Design 06-15-2025 0 4	0	4
	Using EMAC hps peripheral in FPGA mode por snehal_p Nuevo Colaborador I en FPGA, SoC, And CPLD Boards And Kits 06-15-2025 0 3	0	3
	NIOS handle IRQ from FPGA register por ZhiqiangLiang Nuevo Colaborador I en Nios® V/II Embedded Design Suite (EDS) 06-15-2025 0 7	0	7
	Publication of the FPGA bitstream (.pof) as Open Source por Laura6721 Principiante en Programmable Devices 06-15-2025 0 4	0	4

FPGA

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Programmable Devices

FPGA Intellectual Property

FPGA, SoC, And CPLD Boards And Kits

Intel® FPGA University Program

Application Acceleration With FPGAs

Nios® V/II Embedded Design Suite (EDS)

Intel® SoC FPGA Embedded Development Suite

Intel® Quartus® Prime Software

Intel® High Level Design

Intel® FPGA Software Installation & Licensing

FPGA Wiki

Assistance Required: Persistent Oscillation Issues on MAX10 LVDS Receiver Inputs

EMIF Location constraint error

How to Modify Intel EMIF IP for STT-MRAM Support Similar to Xilinx MIG Patch Mechanism?

Failed to launch NIOSV Command Shell. Getting (0xc0000142) application error.

mouse error in using signalTap

Trying to understand on-chip memory

Quartus Prime Lite cannot find Board files

DE2-35 send .hex image to PC through USB port

Questa does not run on Redhat 8.7 in a virtual machine

PCIe design reference recommendation (Cyclone 10 GX)

Agilex board POF file programming - causing lspci enumeration problem

Modular approach for the NIOS ii processor intigration with main FPGA file

Using EMAC hps peripheral in FPGA mode

NIOS handle IRQ from FPGA register

Publication of the FPGA bitstream (.pof) as Open Source

Featured Content

Accelerate your distributed workforce with Intel vPro and VMware Workspace ONE

Intel® Arc™ Game On Driver Released for Madden NFL 23* and Saints Row* With Arc Control Support

Chips & Salsa Episode 14: Intel STORM Team: SPEAR

How could I understand “IOPLL could drive the lvds tx transmitter in adjacent bank"

qspi driver in NIOS bsp in Cyclone 10

How can you create a .vqm file or equivalent in Quartus Prime Standard 23.1?