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AVX2 Intrinsics for Arithmetic Shift Operations documentation discrepancy


In the User and Reference Guide for the Intel C++ Compiler 15.0, each of the AVX2 Intrinsics for Arithmetic Shift Operations describe the behavior of the "empty" bits resulting from an arithmetic right shift operation in a manner similar to the following (e.g., the description for _mm256_srai_epi16/32):

The empty low-order bytes [sic.] are cleared (set to all '0'). If the value specified by count is greater than 15 or 31, the destination vector is set to all '0'.

This seems to describe a left shift operation, and is inconsistent with the description of the corresponding AVX2 instruction (in this case, VPSRAW/VPSRAD) in the Intel 64 and IA-32 Architectures Software Developer's Manual:

As the bits in the data elements are shifted right, the empty high-order bits are filled with the initial value of the sign bit of the data element. If the value specified by the count operand is greater than 15 (for words) or 31 (for doublewords), each destination data element is filled with the initial value of the sign bit of the element.

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Thanks for catching this Nathan. I've filed an issue with the doc team and will updated you as soon as the release with the fix is out, appreciate much.


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