I am very interested in using the ICC long-term for low latency programming. Because of this I would like to try and get some documentation on the sort of optimizations the ICC does and doesn't do. Does this sort of documentation exist/are Intel able to provide something?
EDIT I would want to learn which micro optimizations are completely pointless, how the ICC implements various parts of the C++ language, optimizations performed, how the memory layout is organized etc. It would save many hours observing outputted assembler!