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Are /arch and /Qax mutually exclusive?

Guillaume_A_
New Contributor I
956 Views

Hello,

 

I just read /Qax documentation  and I am a bit confused. I quote: 

"This option tells the compiler to generate multiple, feature-specific auto-dispatch code paths for Intel® processors if there is a performance benefit. It also generates a baseline code path"

"The baseline code path is determined by the architecture specified by options -m or -x (Linux* and macOS*) or options /arch or /Qx (Windows*)"

"If you specify both the -ax and -march options (Linux and macOS*), or the /Qax and /arch options (Windows), the compiler will not generate Intel-specific instructions."

 

I do not get it. How to generate baseline and Intel-specific instructions if /arch and /Qax mutually exclusive?

Is that a typo? Do I misunderstand something here?

I also wonder what would be the baseline code path when using /Qax whitout /arch nor /Qx.

In attachment a table of what I understand from the documentation. Could you correct and complete it please?

 

Context: I would like my code to run as fast as possible on non-Intel processors (AVX2 compatible), Intel Broadwell and Skylake processors.

 

My config: Windows 10 64bit, Intel One API 2021.1.1, Intel compiler 19.2.

 

Thanks,

Guillaume A.

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1 Solution
Viet_H_Intel
Moderator
784 Views

The documentation on these options are somewhat confusing. Let me try to address all your questions:

 

Are /arch and /Qax mutually exclusive?

No, only /arch and /Qx are mutually exclusive. The last one on the command line will be used?

 

baseline code path:

Ex: if you compiled with /QaxCORE-AVX2, then your baseline code path supports SSE2 and the optimized code path is targeted for Intel's AVX2. 

 

feature-specific auto-dispatch code paths:

If you run the binary built with /QaxCORE-AVX2 on a system which doesn't support AVX2 (Intel and non-Intel), the baseline will be chosen to execute. If you run on Intel's AVX2 support  system, then the optimized codepath for Intel's AVX2 will be chosen. 

 

Intel-specific instructions: 

EX: Both Intel and Non-Intel hardwares are supported AVX512, but there are some AVX512 instructions only support on IA. For example, AFAIK, AVX-512 Vector Byte Manipulation Instructions (VBMI) only supports on IA. 

 

Intel feature-specific optimizations: 

For example above Intel specific-instructions: if you compile with /QaxICELAKE. Compiler may generate code that optimizes for ICELAKE and uses Intel feature specific (VBMI) as example.

 

What would be the baseline code path when compiling with /Qax without /arch nor /Qx?

The baseline will be supported SSE2.

 

What will be generated if I compile with: /arch:AVX /Qax:CORE-AVX2

There would be 3 code paths, one is default to SSE2, one is optimized for AVX (supported both IA and non-IA) and one is for  AVX2. 

 

icl.exe /Qm64 /arch:AVX /Qopt-report:5 /Qopt-report-format:vs /QaxCORE-AVX2,CORE-AVX512.

The optimization report shows that the compiler generates paths for AVX, AVX2 and AVX512.

Could you confirm please?

Yes, but the compiler wont generate Intel-specific instructions.

 

Keep in mind that even both IA and non-IA are supported AVX, AVX2 and AVX512, but at instruction levels, they are not the same. 

 

Hope that helps.

 

Thanks,

 

View solution in original post

8 Replies
RahulV_intel
Moderator
926 Views

Hi,


No Intel-specific instructions will be generated when -march (Linux/Mac) or /arch (Windows) flags are enabled along with -ax or /Qax flag. This is because specifying -march disables -ax and specifying /arch disables /Qax.


>>I do not get it. How to generate baseline and Intel-specific

instructions if /arch and /Qax mutually exclusive?

I need to check internally whether it's possible. I will let you know once I have the info.


Regards,

Rahul


RahulV_intel
Moderator
870 Views

Hi,


>> I need to check internally whether it's possible. I will let you know once I have the info.

Since -march flag disables -ax, it would not be possible to generate Intel specific instructions.


Thanks,

Rahul


Guillaume_A_
New Contributor I
845 Views

Hi,

Thanks for your answer Rahul.

 

It appears that the /Qax documentation has been modified since my first post. Now I read:

If you specify both the /Qax and /arch options, the baseline code will execute on non-Intel processors compatible with the setting specified for the /arch option.
If you specify both the /Qax and /arch options, the compiler will not generate Intel-specific instructions. This is because specifying /arch disables /Qax.

But /arch documentation says:

If you specify both the /Qax and /arch options, the compiler will not generate Intel-specific instructions.

That does not means exactly the same thing. Am I wrong? 

 

I am using the both options /arch:AVX and /Qax:CORE-AVX2 to compile my code. I am pretty sure that my program uses AVX2 instructions at runtime if the processor is compatible. I will try to confirm it. 

 

I am sorry but it is still unclear for me. What are the differences between:

What would be the baseline code path when compiling with /Qax whitout /arch nor /Qx?

What will be generated if I compile with: arch:AVX /Qax:CORE-AVX2

 

Regards,

Guillaume A.

 

 

Guillaume_A_
New Contributor I
841 Views

I just tried to compile with both  /arch and /Qax, from my point of view /arch does not disable /Qax

Eg: 

void vectorSqrtD(double* Z, const double* X, const int n)
{
 __pragma(ivdep)
 for (int i = 0; i < n; i++){
 Z[i] = sqrt(X[i]);
 }
}

compile with: 

icl.exe /Qm64 /arch:AVX /Qopt-report:5 /Qopt-report-format:vs /QaxCORE-AVX2,CORE-AVX512

 The optimization report shows that the compiler generates paths for AVX, AVX2 and AVX512.

 

Could you confirm please?

 

Regards,

Guillaume A.

RahulV_intel
Moderator
862 Views

Hi,


Do you have any updates?

Let us know if I can close this thread.


Thanks,

Rahul


Viet_H_Intel
Moderator
785 Views

The documentation on these options are somewhat confusing. Let me try to address all your questions:

 

Are /arch and /Qax mutually exclusive?

No, only /arch and /Qx are mutually exclusive. The last one on the command line will be used?

 

baseline code path:

Ex: if you compiled with /QaxCORE-AVX2, then your baseline code path supports SSE2 and the optimized code path is targeted for Intel's AVX2. 

 

feature-specific auto-dispatch code paths:

If you run the binary built with /QaxCORE-AVX2 on a system which doesn't support AVX2 (Intel and non-Intel), the baseline will be chosen to execute. If you run on Intel's AVX2 support  system, then the optimized codepath for Intel's AVX2 will be chosen. 

 

Intel-specific instructions: 

EX: Both Intel and Non-Intel hardwares are supported AVX512, but there are some AVX512 instructions only support on IA. For example, AFAIK, AVX-512 Vector Byte Manipulation Instructions (VBMI) only supports on IA. 

 

Intel feature-specific optimizations: 

For example above Intel specific-instructions: if you compile with /QaxICELAKE. Compiler may generate code that optimizes for ICELAKE and uses Intel feature specific (VBMI) as example.

 

What would be the baseline code path when compiling with /Qax without /arch nor /Qx?

The baseline will be supported SSE2.

 

What will be generated if I compile with: /arch:AVX /Qax:CORE-AVX2

There would be 3 code paths, one is default to SSE2, one is optimized for AVX (supported both IA and non-IA) and one is for  AVX2. 

 

icl.exe /Qm64 /arch:AVX /Qopt-report:5 /Qopt-report-format:vs /QaxCORE-AVX2,CORE-AVX512.

The optimization report shows that the compiler generates paths for AVX, AVX2 and AVX512.

Could you confirm please?

Yes, but the compiler wont generate Intel-specific instructions.

 

Keep in mind that even both IA and non-IA are supported AVX, AVX2 and AVX512, but at instruction levels, they are not the same. 

 

Hope that helps.

 

Thanks,

 

Guillaume_A_
New Contributor I
754 Views

Hello Viet,

Thanks for these detailed explanations.

It is ok, you may close this thread.

Regards,

Guillaume A.

Viet_H_Intel
Moderator
741 Views

Thanks.

We will no longer respond to this thread. If you require any additional assistance from Intel, please start a new thread. Any further interaction in this thread will be considered community only.


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