Code Crashes on AMD CPU with SSE3 Support Using /arch:SSE3

[Royi]

Hello,

I am using Intel Compiler to compile a code.
I use the following flags for creating the code paths:

/arch:SSE3 /QaxAVX2

I follow the documentation as written in Intel C++ Compiler 19.0 Developer Guide and Reference:

• Compiler Option arch.
• Compiler Option Qax.

What I expect the code to do is work on any CPU with SSE3 (Be Intel / AMD or any other x86-x64 with SSE3 support).
If the CPU has AVX2 support as well here will be an optimized code path fro that as well.
Since I used the /arch flag the AVX2 code path won't be limited to Intel CPU Only as it says:

If you specify both the -ax and -march options (Linux and macOS*), or the /Qax and /arch options (Windows), the compiler will not generate Intel-specific instructions.

I must say the documentation is very not clear. As I think when it says Intel Specific Instructions it means the code path won't require Intel CPU but only feature (AVX2). 

Anyhow, the problem is I'm trying to run the code on AMD CPU with SSE3 (Phenom II) and the code crashes.
I expect it to see this CPU has SSE3 (Though no AVX2) and chose that code path.

Any idea?

[JenniferJ]

it sounds like a bug. how about try /arch:SSE3 only? does it work? 

btw. your understanding on /arch is correct. it sets the baseline instruction set. 

Jennifer 

[Royi]

@Jennifer,

It is more than that.
Your documentation says that once the user use /arch: or -m (Windows or macOS / Linux respectively) the compiler will generate a code which doesn't require Genuine Intel (Namely should work on any x86 CPU) but will work according to the CPU features and not the manufacture.

It really sucks it doesn't work and according to many forum posts it hasn't been working for a long time.

Please, try to fix it in Intel Compiler 2019 Update 2.

[JenniferJ]

Could you please file a ticket at Online Service Center: https://software.intel.com/en-us/articles/how-to-create-a-support-request-at-online-service-center? 

It's probably associated to your case only.  It is necessary to have a testcase, and thanks!

Jennifer 

[Royi]

Hi Jennifer,

I already opened one (#04027671).
Test case would be any code I guess as there is nothing special in my code.

I'm not the only one with this.
See https://software.intel.com/en-us/forums/intel-c-compiler/topic/801418.

Also the documentation on the code path are not clear (See https://software.intel.com/en-us/forums/intel-c-compiler/topic/757727).

Anyhow, you really need to make sure Qax works as expected both when used with /arch: or -m and with /Qx or -x.
It seem it hasn't been working for a long time.

[Royi]

@Jennifer,

Have you looked into this?
It really makes using ICC hard.

I now also have issues with the same configuration above with Intel CPU of Nehalem and Westmere.
Both support SSE4.2 but the generated code crash on them.