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This time a different problem... I did review forum here - but found no reference to the latest version 11.0 of the compiler..
I was sure that program compiled with options :/c /O3 /arch:IA32 /fp:fast /QaxSSE4.2 /Qparallel
Will work on every x32 compatilbe machine (including all AMD ones). With previous version of intel ( 10.x ) - I was using different parameters - now depreciated - /QaxNST (if remember correctly)
But what surprise - I'm starting to get problem reports that program is stuck with 'could not read from memory' fatal error - only from AMD driven machines.
I though - two paths (if apply) will be created - for generic and for mP with SSE4.2 support - am I wrong?
Thanks for your help...
Stan
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Quoting - Stan
I was sure that program compiled with options :/c /O3 /arch:IA32 /fp:fast /QaxSSE4.2 /Qparallel
Will work on every x32 compatilbe machine (including all AMD ones). With previous version of intel ( 10.x ) - I was using different parameters - now depreciated - /QaxNST (if remember correctly)
If you are serious about wanting code paths only for Core i7 and for non-SSE, you might file a documentation request on premier,intel.com asking whether that is supported, and how it should be specified (/arch:IA32SSE4.2 ?). I wouldn't be surprised if this desire was not anticipated; I don't know of Core i7 being marketed as a general purpose Windows 32-bit platform. A more common desire might be to support both non-SSE and generic SSE2 or SSE3, and I would agree the docs aren't clear on how to do it.
We had difficulty already with support for multiple path combining P-III/Athlon-32 and Northwood in ifort 9.1 and 10.1, and I believe the 11.0 compiler may no longer be able to compile when running on non-SSE2 models. Generally speaking, support for models over 5 years beyond last production isn't the best.
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Quoting - tim18
It looks like the compiler didn't understand that you want to support non-SSE machines, such as /arch:IA32 would do by itself. If I understand the first one, you say first you want non-SSE code, then you potentially over-ride by asking for full aggressive optimization for Core i7, and generic SSE2 code otherwise? And in the second one, you wanted 3 special code paths for various Intel CPU models, otherwise defaulting to non-SSE. That seems unlikely to have been optimum. That older style option should still work, except for requiring CPUs to support SSE2 as a minimum.
If you are serious about wanting code paths only for Core i7 and for non-SSE, you might file a documentation request on premier,intel.com asking whether that is supported, and how it should be specified (/arch:IA32SSE4.2 ?). I wouldn't be surprised if this desire was not anticipated; I don't know of Core i7 being marketed as a general purpose Windows 32-bit platform. A more common desire might be to support both non-SSE and generic SSE2 or SSE3, and I would agree the docs aren't clear on how to do it.
We had difficulty already with support for multiple path combining P-III/Athlon-32 and Northwood in ifort 9.1 and 10.1, and I believe the 11.0 compiler may no longer be able to compile when running on non-SSE2 models. Generally speaking, support for models over 5 years beyond last production isn't the best.
If you are serious about wanting code paths only for Core i7 and for non-SSE, you might file a documentation request on premier,intel.com asking whether that is supported, and how it should be specified (/arch:IA32SSE4.2 ?). I wouldn't be surprised if this desire was not anticipated; I don't know of Core i7 being marketed as a general purpose Windows 32-bit platform. A more common desire might be to support both non-SSE and generic SSE2 or SSE3, and I would agree the docs aren't clear on how to do it.
We had difficulty already with support for multiple path combining P-III/Athlon-32 and Northwood in ifort 9.1 and 10.1, and I believe the 11.0 compiler may no longer be able to compile when running on non-SSE2 models. Generally speaking, support for models over 5 years beyond last production isn't the best.
Hello,
Thanks for your remarks -I don't have any AMD machine nearby..
Even worse - with 11.0.x I made a compilation with ONLY /arch:ia32 and without any additional /Qax... - and - it is not working on AMD ATHLON (which are not so old - as I guess).
Now I'm starting to be lost, with 10.0 I had no such issues - and I can't see in documentation any remark regarding keeping portability.
Do you suggest that I should stay with 10.0 - to keep compatibility with ATHLON?
Thanks,
Stan
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Quoting - Stan
Hello,
Thanks for your remarks -I don't have any AMD machine nearby..
Even worse - with 11.0.x I made a compilation with ONLY /arch:ia32 and without any additional /Qax... - and - it is not working on AMD ATHLON (which are not so old - as I guess).
Now I'm starting to be lost, with 10.0 I had no such issues - and I can't see in documentation any remark regarding keeping portability.
Do you suggest that I should stay with 10.0 - to keep compatibility with ATHLON?
Thanks,
Stan
Athlon supports only SSE, not SSE2 so if the compiler generated code contains any SSE2 instructions that may be the source of the problem.
Make sure that you are using the latest compiler build (11.0.072) before investigating further because it fixes some nasty code generation bugs.
As for /ARCH:IA32:
generate generic IA-32 architecture code for Intel Pentium
III and compatible Intel processors. Disables any default
or previously set extended instruction setting
So it should work as it says.
Try compiling with /FAs and if you find any other than generic instructions please file an issue with Premier Support.
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