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lmeyerov2
Beginner
77 Views

Compiler flag to disable all vectorization?

Is there a way to disable vectorization as a compiler flag (overriding and pragmas in the code)? Ideally it would leave instrinsics in place (or use a software interpretation..), but not as big a deal.

Thanks!
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5 Replies
TimP
Black Belt
77 Views

Is /Qvec- not what you want? I don't understand your comment about intrinsics. /Qvec- would prevent implicit invocation of svml (short vector library) functions.
lmeyerov2
Beginner
77 Views

It looks like "/Qvec-" what I was mostly looking for (had been trying "/vec-").

For intrinsics, I'd hope something like "_m128i a = _mm_load_si128(b);" gets expanded into normal instructions (in this case, multiple loads into a regular register) instead of SSE ones (movdqa into an xmm).

JenniferJ
Moderator
77 Views

if you do not want any SSE instructions in the code, you should use /arch:IA32.

I don't think theicl will convert the SSE intrinsics to x86 instructions for you automatically though.

Jennifer
jimdempseyatthecove
Black Belt
77 Views

Jennifer et al,

Perhapse one could use

#pragma vector never
do {
....
} while(false);

However, you consider permitting

#pragma vector never
{ // for duration of scope
...
} // #pragma vector never

Current documentation indicate pragma is followed by loop.

The scoping feature will extend across functions too
(similar to how one uses:

extern "C" {
...
} // extern "C" {

surrounding multiple functions.

Jim Dempsey



Om_S_Intel
Employee
77 Views

The following pragma is new feature request:

#pragma vector never

We will discuss this win the internal team. If many customers are looking for this them we may cosider implementing this in the Intel compiler.

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