As discussed here: https://github.com/easybuilders/easybuild-easyconfigs/issues/8003 some codes don't compile using -xCORE-AVX512 if newer binutils are used (>=2.30, note that https://software.intel.com/en-us/articles/intel-c-compiler-191-for-linux-release-notes-for-intel-par... says that up to 2.29 is supported, so perhaps Intel is aware already, but I could not find this documented anywhere else publically)
The issue is that Intel compilers generate instructions such as "vmovd %xmm16,%r10" which should really be with a "q", so "vmovq %xmm16,%r10". In this patch: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff;h=704a705d7aaab8041df76e2981e2... H.J. Lu removed support for this syntax for xmm registers >15 as it's never generated by GCC.
This patch re-adds them to binutils:
and then CGAL and some other packages can be compiled again.
I am putting this out here so people who run into similar issues can find it but Intel: can you please fix this issue in the compiler?
(Note that H.J. Lu works for Intel!)
- Development Tools
- Intel® C++ Compiler
- Intel® Parallel Studio XE
- Intel® System Studio
- Parallel Computing
Not sure what I've missed, but it compiled successfully.
$ icpc -xCore-AVX512 -c test.cpp -w
$ ls -lt test.o
-rw-r--r-- 1 ... ome 1269840 Feb 19 18:07 test.o
$ gcc -v
gcc version 8.1.0 (GCC)
$ icpc -V
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 22.214.171.124 Build 20191121
Copyright (C) 1985-2019 Intel Corporation. All rights reserved.
$ cat /etc/redhat-release
Red Hat Enterprise Linux Server release 7.1 (Maipo)
you are probably using the older binutils (2.27 as shipped with RHEL 7.1). You can try on RHEL 8 which ships with binutils 2.30 or compile binutils yourself:
$ wget ftp://ftp.gnu.org/gnu/binutils/binutils-2.34.tar.gz
$ tar xf binutils-2.34.tar.gz
$ cd binutils-2.34
$ ln -s gas/as-new as
$ export PATH=$PWD:$PATH
$ as --version
GNU assembler (GNU Binutils) 2.34 (...)
$ icpc -xCORE-AVX512 -c all_files.cpp.i
/tmp/icpccSQyCpas_.s: Assembler messages:
/tmp/icpccSQyCpas_.s:125413: Error: unsupported instruction `vmovd'
Another way is to compile via assembly:
$ icpc -xCORE-AVX512 -S all_files.cpp.i
$ /usr/bin/as all_files.cpp.s
gives no complaint but
$ /path/to/binutils-2.34/gas/new-as all_files.cpp.s
where /path/to is where you unpacked and made binutils complains about vmovd. This way you don't need to manipulate PATH nor set the symbolic link.
The Developer said this is an issue with the newer assembler, because the code generated are the same on both RHEL7 and RHEL8, but as in 2.30 couldn't be able to assemble it.
One interesting detail he noticed. Assembler seems only complain about those vmovd instructions where any of upper 16 registers is used:
vmovd %xmm1, %r8 # Okay
vmovd %xmm30, %rdx # Assembler issues an error message
Yes that is exactly what I mentioned before: "H.J. Lu removed support for this syntax for xmm registers >15 as it's never generated by GCC."
However use of vmovd is wrong here: it's operating on 64-bit registers which should use a "q" suffix.
vmovq %xmm1, %r8 # Okay
vmovq %xmm30, %rdx # Okay
This issue has been fixed in PSXE2020 update 4. Can you please try it out? And we will no longer respond to this thread.
If you require additional assistance from Intel, please start a new thread. Any further interaction in this thread will be considered community only.