Incorrect code for for inline assembly with -O0 and const array

[Alexandr_K_Intel1]

It seems Intel compiler produces incorrect code for inline assembly if -O0 is used.

akonovx@nnlmsdk228:~/small$ icc -V
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.2.275 Build 20200623
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
akonovx@nnlmsdk228:~/small$ icpc -xSSE4.2 -std=c++11 -m64 -g -fPIC -g icc-asm.cpp -O0
akonovx@nnlmsdk228:~/small$ gdb ./a.out
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Type "show configuration" for configuration details.
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Reading symbols from ./a.out...done.
(gdb) r
Starting program: /home/akonovx/small/a.out

Program received signal SIGSEGV, Segmentation fault.
0x00000000004006cb in decode (pState=1) at icc-asm.cpp:11
11 __asm__ (
(gdb) disassemble
Dump of assembler code for function decode(unsigned int):
0x000000000040069c <+0>: push %rbp
0x000000000040069d <+1>: mov %rsp,%rbp
0x00000000004006a0 <+4>: sub $0x20,%rsp
0x00000000004006a4 <+8>: mov %rbx,-0x10(%rbp)
0x00000000004006a8 <+12>: mov %edi,-0x18(%rbp)
0x00000000004006ab <+15>: movl $0x2a,-0x20(%rbp)
0x00000000004006b2 <+22>: movl $0xc,-0x1c(%rbp)
0x00000000004006b9 <+29>: mov -0x18(%rbp),%eax
0x00000000004006bc <+32>: lea 0x200979(%rip),%rdx # 0x60103c <offset>
0x00000000004006c3 <+39>: mov (%rdx),%ecx
0x00000000004006c5 <+41>: mov -0x20(%rbp),%ebx
0x00000000004006c8 <+44>: sub -0x1c(%rbp),%ecx
=> 0x00000000004006cb <+47>: cmovae 0xb2(%rax),%ebx
0x00000000004006d2 <+54>: mov %ebx,-0x20(%rbp)
0x00000000004006d5 <+57>: mov %ecx,(%rdx)
0x00000000004006d7 <+59>: mov -0x20(%rbp),%eax
0x00000000004006da <+62>: mov -0x10(%rbp),%rbx
0x00000000004006de <+66>: leaveq
0x00000000004006df <+67>: retq
End of assembler dump.

With -O1 the code for cmovae is correct, i.e. I got

0x0000000000400c01 <+27>: cmovae (%rcx,%rdi,1),%eax

const for trans is significant as well, the code is correct without const.

gcc version 7.5.0 (Ubuntu 7.5.0-3ubuntu1~18.04)

#include <cstdint>

uint32_t offset;

const uint8_t trans[] = { 1,   0 };

uint32_t decode(uint32_t pState) {
    uint32_t transState  = 42;
    uint32_t scaledRange = 12;

    __asm__ (
        "\n    subl     %[scaledRange],   %[offset]"       // if ( (offset -= scaledRange ) >= 0 )
        "\n    cmovnbl  %[transPState], %[transState]"     //    transState = trans[pState];
        : [offset]         "+r" (offset)
        , [transState]     "+r" (transState)
        : [scaledRange]    "rm" (scaledRange)
        , [transPState]     "m" (trans[pState])
    );

    return transState;
}

int main() {
    return decode(1);
}

[PrasanthD_intel]

Hi Alexander,

Thanks for reporting.

We have also found similar behaviour when optimizations were disabled (with -O0 flag).

We are escalating this to our internal team.

Regards

Prasanth

[Viet_H_Intel]

I've reported this bug to the Developer.

I tried your sample code with icpx and didn't see this issue.

Thanks,

$ icpc -fPIC t.cpp -O0 &&./a.out

Segmentation fault (core dumped)

$ icpx -fPIC t.cpp -O0 &&./a.out

$

[MaheshB_Intel]

HI,

Could you please let us know if the workaround provided resolves your issue. Can we go ahead and close this thread?

thanks.

[PrasanthD_intel]

Hi Alexander,

We are closing this thread as we haven't heard back from you, assuming your issue has been resolved. We will no longer respond to this thread. If you require additional assistance from Intel, please start a new thread. Any further interaction in this thread will be considered community only.

Regards

Prasanth