Intel intrinsic functions parallel for non supported cpu

[chmod]

Hello

I was wondering if there are some parallel functions for _rdrand32_step and _mm_sha1msg1_epu32 and the liking for non supported INTEL® 64 AND IA-32 PROCESSORS.

Eventually, I would like to use these functions in my code for a wide variety of cpu architectures and not just IA-32 and Intel® 64 supported cpus (besides software implementation)



thanks

C

[MadhuK_Intel]

Hi,

Thanks for posting in intel communities.

>>non supported INTEL® 64 AND IA-32 PROCESSORS

Sorry for causing inconvenience. We could not provide support for non-intel architecture processors.

Please refer to this URL for more information on intel intrinsics and its supported architectures.

URL: https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html

Thanks & regards,

Madhu

[chmod]

Hi

So I am referring to intel CPUs that lack some of the intrinsics functionality.
There are very powerful new CPUs by Intel that do not support avx2 for example, so my question is :
How to port this avx2 functionality to other Intel CPUs that do not support these firmware functions ?

Thank you

[MadhuK_Intel]

Hi,

Sorry for the miscommunication. Could you please provide the below-mentioned information?

1. From which architecture to which architecture do you want to port the intrinsics?
2. The exact intel intrinsics you wanted to port and use?
3. Details of the processor you are using and supported Instruction Set Architectures in your processor.  

Thanks and regards,

Madhu

[chmod]

Hi Madhu

So I would like to port avx2, rdrand and sha1 intrinsic.

I am trying to make them work as firmware efficient as possible on Intel xeon 8081m for instance.

For exame, I would like to find out how to port _mm_sha1nexte_epu32
OR
_rdrand32_step and more functions..

Can this b wm

[chmod]

And to be more specific, can
_mm_sha1rnds4_epu32 which is part of sha extension, be ported to SSE or AVX?

[MadhuK_Intel]

Hi,

We are looking into your issue however we want the following details which need to be conveyed to the developers.

1.     Which other Intel Intrinsics you would like to be ported (you have mentioned _mm_sha1rnds4_epu32)?

2.     On which specific processor you would like it to be ported (you have mentioned Intel xeon 8081m)?

We are confirming with you so that we can make a specific request to the developers.

Thanks and regards,

Madhu

[chmod]

Hi

So sha cpu flag is not available for most of Intel server class cpus.
SHA1 functions that needs equivalent firmware support are:

_mm_sha1rnds4_epu32

_mm_sha1msg1_epu32

_mm_sha1msg2_epu32

_mm_sha1nexte_epu32

The cpus that I am using support SSE, AVX, AVX2 and I would like to implement a similar firmware functionality on them instead of software implementation.
Relevant cpu models :
Xeon E-2286G
Which supports Intel® SSE4.1, Intel® SSE4.2, Intel® AVX2

Or

Xeon Platinum 8180M
Which supports Intel® SSE4.2, Intel® AVX, Intel® AVX2, Intel® AVX-512


Thank you

[MadhuK_Intel]

Hi,

We have reported this issue to the concerned development team. They are looking into your issue.

Best Regards,

Madhu

[Viet_H_Intel]

Hi,

All intrinsics we have are listed on the Intrinsic Guide pointed out by Madhu.

I don't have the same CPUs as yours, but if you run "cat /proc/cpuinfo|grep sha_ni" and if there is a match then those intrinsics you mentioned are supported. I think they are, but don't have systems to verify.

Thanks,

[chmod]

So, you can clearly see in ark.intel.com site that many xeon / server class cpu do not have sha support under Instruction Set Extensions.
And yes, I have checked with cat /proc/cpuinfo and no sha is available.

I would like Intel to present a parallel firmware implementation to sha1, relying on SSE ,AVX or other more common extensions available on the mentioned cpus.
AMD for example, support sha on most server class cpus..

Thank you

[Viet_H_Intel]

We will discuss this with our compiler developers and get back to you.

Thanks,

Viet

[chmod]

Any updates please?

Thank you

[Viet_H_Intel]

Sorry, I don't have any update from the development team.