Intel® C++ Compiler
Support and discussions for creating C++ code that runs on platforms based on Intel® processors.
Announcements
Welcome to the Intel Community. If you get an answer you like, please mark it as an Accepted Solution to help others. Thank you!

icc and fftw and __INT_MAX__

parker__velocity
New Contributor I
1,955 Views

$ icc --version

icc (ICC) 19.1.2.254 20200623

fftw is 3.3.8

$ ./configure --prefix=/shared/ --enable-sse2 --enable-avx --enable-shared=no --enable-static=yes --disable-doc F77=ifort CC=icc

appears to run fine, but

$ make

....

libtool: compile:  icc -no-gcc -DHAVE_CONFIG_H -I. -I.. -I .. -O3 -ansi-alias -malign-double -MT tensor.lo -MD -MP -MF .deps/tensor.Tpo -c tensor.c -o tensor.o

tensor.c(31): error: identifier "__INT_MAX__" is undefined

       if (FINITE_RNK(rnk) && rnk > 1)

 

if i hack the configure file and replace "-no-gcc" to "-gcc-sys" then compiling and check work fine (apparently).

this did not happen with 2019 version of icc.

is there a better solution since i don't want to hack fftw's configure? is this a bug in the current icc?

Labels (1)
0 Kudos
1 Solution
Viet_H_Intel
Moderator
1,912 Views

This is a known issue for icc version 19.1.2

There are several workaround:

1) Use icx instead of icc as you have noticed

2) remove -no-gcc

3) add  -Qoption,cpp,--gnu_version=40805

4) use icc 19.1 update 1 (version 19.1.1.217 Build 20200306)


Thanks,

Viet



View solution in original post

16 Replies
parker__velocity
New Contributor I
1,940 Views

so, changing CC=icc to CC=icx, fftw 3.8.8 compiles/checks fine.

changing CC="icc -gcc-sys" does not (configure appends '-no-gcc').

AbhishekD_Intel
Moderator
1,921 Views

Hi,


Thanks for reaching out to us.

We have tried all the steps you have mentioned in the issue. And we are able to reproduce this issue. So we are forwarding this issue to the concerned team, they will get back to you soon.

 


Warm Regards,

Abhishek


Viet_H_Intel
Moderator
1,913 Views

This is a known issue for icc version 19.1.2

There are several workaround:

1) Use icx instead of icc as you have noticed

2) remove -no-gcc

3) add  -Qoption,cpp,--gnu_version=40805

4) use icc 19.1 update 1 (version 19.1.1.217 Build 20200306)


Thanks,

Viet



View solution in original post

parker__velocity
New Contributor I
1,880 Views

Thank you.

I will roll back to icc 19.1 update 1 since i ran into another problem. namely w/ --enable-avx512 on AWS's c5 instance, fftw 3.3.8 fails to compile. i.e.:

$ ./configure --prefix="/shared/.mrm/intel" --enable-sse2 --enable-avx2 --enable-avx512 --enable-shared=no --enable-static=yes --disable-doc F77=ifort CC=icx

$ make

...

libtool: compile:  icx -DHAVE_CONFIG_H -I. -I../../.. -I ../../.. -O3 -fomit-frame-pointer -mtune=native -fstrict-aliasing -MT n1fv_4.lo -MD -MP -MF .deps/n1fv_4.Tpo -c n1fv_4.c -o n1fv_4.o

In file included from n1fv_4.c:3:

In file included from ./../common/n1fv_4.c:82:

In file included from ../../../dft/simd/n1f.h:21:

../../../simd-support/simd-avx512.h:48:2: error: "compiling simd-avx512.h without avx-512f support"

#error "compiling simd-avx512.h without avx-512f support"

while

$ lscpu

Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single pti fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves ida arat pku ospke

this did not happen with 2019 update4 on the same instance.

 

Viet_H_Intel
Moderator
1,877 Views

Seems like you use icx in this later case. Did it compile with icc? Can you provide us a preprocess file to take a look?

icx -DHAVE_CONFIG_H -I. -I../../.. -I ../../.. -O3 -fomit-frame-pointer -mtune=native -fstrict-aliasing -MT n1fv_4.lo -MD -MP -MF .deps/n1fv_4.Tpo -n1fv_4.c -E


parker__velocity
New Contributor I
1,873 Views

Yes, i used icx (just assumed icc would have the same problem). Let me spin up a c5 and try w/ icc...

 

parker__velocity
New Contributor I
1,870 Views

1) no, icc throws the same error as the original post

2) hacking configure to replace -no-gcc to -gcc-sys gives a successful compile/test of CC=icc

3) i've included config.log with CC=icx and the generated simd-support/simd-avx512.h. interestingly, both icx and icc generate the same simd-avx512.h.

You'll have to give me a bit more information (exactly what) if this is not sufficient.

 

Viet_H_Intel
Moderator
1,864 Views

I am interested in this error:

../../../simd-support/simd-avx512.h:48:2: error: "compiling simd-avx512.h without avx-512f support"

#error "compiling simd-avx512.h without avx-512f support"


I guess, this how n1fv_3.c was compiled

$icx -DHAVE_CONFIG_H -I. -I../../.. -I ../../.. -O3 -fomit-frame-pointer -mtune=native -fstrict-aliasing -MT n1fv_4.lo -MD -MP -MF .deps/n1fv_4.Tpo -c n1fv_4.c -o n1fv_4.o.


If you cd to directory where n1fv_4.c resides, then run:

$icx -DHAVE_CONFIG_H -I. -I../../.. -I ../../.. -O3 -fomit-frame-pointer -mtune=native -fstrict-aliasing -MT n1fv_4.lo -MD -MP -MF .deps/n1fv_4.Tpo n1fv_4.c -E >& n1fv_4.i


and provide us n1fv_4.i

Thanks,




parker__velocity
New Contributor I
1,862 Views

thanks for the instructions. i will do it, but it will take a bit of time...

meanwhile, if you do look at simd-avx512.h, you'll see the error- it tests two macros. i assume icx is failing on the first (i.e. __GNUC__) since icc w/ the hacked configure doesn't throw the error.

parker__velocity
New Contributor I
1,854 Views
Viet_H_Intel
Moderator
1,852 Views

ok, you dont need to create a preprocess file anymore.

I'll need to find a machine with avx512f supports to try.

Can you try this on you system and let me know if it works with icc and fails with icx?

$icc t.c -c [some other options if you have]

$icx t.c -c [some other options if you have]

$ cat t.c

#if defined(__GNUC__) && !defined(__AVX512F__)

#error "compiling simd-avx512.h without avx-512f support"

#endif


int foo() {

  return 1;

}




parker__velocity
New Contributor I
1,848 Views

on AWS c5(.xlarge):

$ lscpu 

Architecture:        x86_64

CPU op-mode(s):      32-bit, 64-bit

Byte Order:          Little Endian

CPU(s):              4

On-line CPU(s) list: 0-3

Thread(s) per core:  2

Core(s) per socket:  2

Socket(s):           1

NUMA node(s):        1

Vendor ID:           GenuineIntel

CPU family:          6

Model:               85

Model name:          Intel(R) Xeon(R) Platinum 8124M CPU @ 3.00GHz

Stepping:            4

CPU MHz:             3400.482

BogoMIPS:            6000.00

Hypervisor vendor:   KVM

Virtualization type: full

L1d cache:           32K

L1i cache:           32K

L2 cache:            1024K

L3 cache:            25344K

NUMA node0 CPU(s):   0-3

Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single pti fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves ida arat pku ospke

$ cat t.c

#if defined(__GNUC__) && !defined(__AVX512F__)

#error "compiling simd-avx512.h without avx-512f support"

#endif

 

int foo() {

  return 1;

}

$ icx t.c -c -mtune=native

t.c:2:2: error: "compiling simd-avx512.h without avx-512f support"

#error "compiling simd-avx512.h without avx-512f support"

 ^

1 error generated.

compilation aborted for t.c (code 1)

$ icc t.c -c -mtune=native

t.c(2): error: #error directive: "compiling simd-avx512.h without avx-512f support"

  #error "compiling simd-avx512.h without avx-512f support"

   ^

 

compilation aborted for t.c (code 2)

$ icc t.c -c -mtune=native -gcc-sys

$

Viet_H_Intel
Moderator
1,840 Views

It's related to -gcc-sys option, which currently isn't supported in icx.

If you run: $icx t.c -c -mtune=native -gcc-sys,I think you

would see a warning message about unsupported option

AFAIK, it will be support in the future.

Thanks,


parker__velocity
New Contributor I
1,835 Views

yes, -gcc-sys is not supported w/ icx.

i'll rollback to 2020 update 1.

parker__velocity
New Contributor I
1,823 Views

fyi- 2020 update 1 icc compiles fftw 3.3.8 as usual, including avx2 and/or avx512 w/o any hacks. 

Perhaps update 3 will go back to a clean compile.

Thanks again!

Viet_H_Intel
Moderator
1,067 Views

This issue is fixed in oneAPI2021.2.

$ icpc -V

Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.2.0 Build 20210228_000000


I am going to close this thread.


Reply