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icx -O0 error in backend: Stack empty??

vzecca
Beginner
479 Views

// icx -O0 ICE error in backend: Stack empty??
int
main (void)
{
long double res = 0x1.0000000000001p+0L;
asm("sqxbr\t%0,%0" : "+f"(res));
}

icx -O0 icxerr5.c
fatal error: error in backend: Stack empty??
clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
Intel(R) oneAPI DPC++/C++ Compiler 2021.3.0 (2021.3.0.20210619)
Target: x86_64-unknown-linux-gnu
Thread model: posix

0 Kudos
1 Solution
Khalik_K_Intel
Moderator
367 Views

As no further questions on this received, we suppose the issue to be resolved.

Explanation on the fault again:


The attached code also fails with gcc and icc, but their error messages are more detailed:

$ gcc -O0 icxerr5.c

icxerr5.c: In function 'main':

icxerr5.c:5:1: error: output constraint 0 must specify a single register

  5 | asm("sqxbr\t%0,%0" : "+f"(res));

   | ^~~


The similar errors have been reported in the past for gcc (ex.: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59157).

If we do the same as described there, we change asm("sqxbr\t%0,%0" : "+f"(res)); to asm("sqxbr\t%0,%0" : "+t"(res));

After the change compilers emit the following:

$ gcc -O0 icxerr5.c

icxerr5.c: Assembler messages:

icxerr5.c:5: Error: no such instruction: `sqxbr %st,%st'


$ icx -O0 icxerr5.c

icxerr5.c:5:5: error: invalid instruction mnemonic 'sqxbr'

asm("sqxbr\t%0,%0" : "+t"(res));

  ^

<inline asm>:1:2: note: instantiated into assembly here

    sqxbr  %st,%st

    ^~~~~

1 error generated.


That is because you are using an IBM instruction sqxbr, which does not seem to be supported on Intel architecture as it does not appear in Intel® 64 and IA-32 Architectures Software Developer Manuals (https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html).

The compilations does not fail with -O2 for example, because -O2 will optimize out the codes in line4-5 since they don't affect the return value of main function.

You can use -S option (https://software.intel.com/content/www/us/en/develop/documentation/oneapi-dpcpp-cpp-compiler-dev-gui...), which causes the compiler to compile to an assembly file only and not link, to find no asm like "sqxbr" is emitted by the compiler.

Steps:

$ icx -O2 -S icxerr5.c

$ cat icxerr5.s


This issue has been resolved and we will no longer respond to this thread. If you require additional assistance from Intel, please start a new thread.

Any further interaction in this thread will be considered community only.


View solution in original post

5 Replies
ShivaniK_Intel
Moderator
465 Views

Hi,


Thanks for reaching out to us.


We are able to reproduce the error at our end. We are working on it and will get back to you soon.


Thanks & Regards

Shivani  


Khalik_K_Intel
Moderator
449 Views

Hello,


Thank you for contacting Intel support.


We were able to reproduce issue on our end, as mentioned before.

We have now escalated this issue to a development team.

Once we have any update from the development team, I will inform you about it in this forum thread.

Have a nice day ahead!


Regards,

Khalik.


Khalik_K_Intel
Moderator
437 Views

Hello,


The attached code also fails with gcc and icc, but their error messages are more detailed:

$ gcc -O0 icxerr5.c

icxerr5.c: In function 'main':

icxerr5.c:5:1: error: output constraint 0 must specify a single register

  5 | asm("sqxbr\t%0,%0" : "+f"(res));

   | ^~~


The similar errors have been reported in the past for gcc (ex.: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59157).

If we do the same as described there, we change asm("sqxbr\t%0,%0" : "+f"(res)); to asm("sqxbr\t%0,%0" : "+t"(res));

After the change compilers emit the following:

$ gcc -O0 icxerr5.c

icxerr5.c: Assembler messages:

icxerr5.c:5: Error: no such instruction: `sqxbr %st,%st'


$ icx -O0 icxerr5.c

icxerr5.c:5:5: error: invalid instruction mnemonic 'sqxbr'

asm("sqxbr\t%0,%0" : "+t"(res));

  ^

<inline asm>:1:2: note: instantiated into assembly here

    sqxbr  %st,%st

    ^~~~~

1 error generated.


That is because you are using an IBM instruction sqxbr, which does not seem to be supported on Intel architecture as it does not appear in Intel® 64 and IA-32 Architectures Software Developer Manuals (https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html).

The compilations does not fail with -O2 for example, because -O2 will optimize out the codes in line4-5 since they don't affect the return value of main function.

You can use -S option (https://software.intel.com/content/www/us/en/develop/documentation/oneapi-dpcpp-cpp-compiler-dev-gui...), which causes the compiler to compile to an assembly file only and not link, to find no asm like "sqxbr" is emitted by the compiler.

Steps:

$ icx -O2 -S icxerr5.c

$ cat icxerr5.s


Hope that this helps.


Regards,

Khalik.


Khalik_K_Intel
Moderator
403 Views

Hello,


Are there any other questions on this?


Regards,

Khalik.


Khalik_K_Intel
Moderator
368 Views

As no further questions on this received, we suppose the issue to be resolved.

Explanation on the fault again:


The attached code also fails with gcc and icc, but their error messages are more detailed:

$ gcc -O0 icxerr5.c

icxerr5.c: In function 'main':

icxerr5.c:5:1: error: output constraint 0 must specify a single register

  5 | asm("sqxbr\t%0,%0" : "+f"(res));

   | ^~~


The similar errors have been reported in the past for gcc (ex.: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59157).

If we do the same as described there, we change asm("sqxbr\t%0,%0" : "+f"(res)); to asm("sqxbr\t%0,%0" : "+t"(res));

After the change compilers emit the following:

$ gcc -O0 icxerr5.c

icxerr5.c: Assembler messages:

icxerr5.c:5: Error: no such instruction: `sqxbr %st,%st'


$ icx -O0 icxerr5.c

icxerr5.c:5:5: error: invalid instruction mnemonic 'sqxbr'

asm("sqxbr\t%0,%0" : "+t"(res));

  ^

<inline asm>:1:2: note: instantiated into assembly here

    sqxbr  %st,%st

    ^~~~~

1 error generated.


That is because you are using an IBM instruction sqxbr, which does not seem to be supported on Intel architecture as it does not appear in Intel® 64 and IA-32 Architectures Software Developer Manuals (https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html).

The compilations does not fail with -O2 for example, because -O2 will optimize out the codes in line4-5 since they don't affect the return value of main function.

You can use -S option (https://software.intel.com/content/www/us/en/develop/documentation/oneapi-dpcpp-cpp-compiler-dev-gui...), which causes the compiler to compile to an assembly file only and not link, to find no asm like "sqxbr" is emitted by the compiler.

Steps:

$ icx -O2 -S icxerr5.c

$ cat icxerr5.s


This issue has been resolved and we will no longer respond to this thread. If you require additional assistance from Intel, please start a new thread.

Any further interaction in this thread will be considered community only.


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