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hurricanezhb
Beginner
108 Views

incompatibility between msvc9 and intel c++ compiler

I change a c++ project from msvc9 to intel c++ compiler that works very fine when using msvc9, but intel c++ compiler produce error in some case. Is there some directives about the incompatibility between the msvc9 and intel c++ compiler?

I used the following options when using intel c++ cpmpiler:

-c -Ox -Og -Ob2 -Oi -Ot -Oy -GT -Qipo -I ../../inc -D NDEBUG -D WIN32 -D _WINDOWS -D __WIN32__ -D _VC80_UPGR
ADE=0x0600 -D _UNICODE -D UNICODE -MT -GS- -Gy -arch:SSE2 -fp:fast -FAs -Fa.\\\\Release/ -Fo.\\\\Release/ -W3 -n";
"ologo -Gd -QaxSSE2 -QxSSE2 -Qvc9 -Qlocation,link,D:\\\\Program Files\\\\Microsoft Visual Studio 9.0\\\\VC\\\\bin".

Besides, when I enable the smaller type check, the program crashes. why?

0 Kudos
7 Replies
TimP
Black Belt
108 Views

Without a specific example, our answers will be as unfocused as your question. Evidently, ICL produces a lot more warnings, particularly for cases of undetermined behavior where it isn't possible to know what VC9 will do, or where VC9 does non-standard things.

Remember that -fp:fast -Ox for VC9 is similar in effect to -fp:source -O1 in ICL. I don't know to what extent VC9 /GL and ICL /Qipo can be compared, but surely they don't treat latent bugs identically.

I don't know what type check you mean; are you surprised that checking stops a run when an error is diagnosed?

hurricanezhb
Beginner
108 Views

The following code incur the compiler error when using smaller type check (/RTCc):

unsigned int iCurrMBCbpMsk = (u32)read_counter() & 0xffff; //read a random number

unsigned short tmpMskz = (_rotr8(iCurrMBCbpMsk>>4, 4)<<4)+(iCurrMBCbpMsk&0xf00f);
unsigned int cbpMask2[2];
cbpMask2[0] = _rotl((_rotl16(iCurrMBCbpMsk, 8)<<16)+iCurrMBCbpMsk, 8);
cbpMask2[1] = _rotl((_rotl16(tmpMskz, 8)<<16)+tmpMskz, 8);

printf("%10x %10x %10x %10x\n", iCurrMBCbpMsk, tmpMskz, cbpMask2[0], cbpMask2[1]);

When not using /RTCc, it runs fine. When enable the /RTCc, it crashes.

hurricanezhb
Beginner
108 Views

The following code has incompatibility between msvc and intel c++ compiler.

__declspec(align(16)) MV pCurMV0[42*2], pMVL11[42*2], Stor0mv[128], Stor1mv[128];
signed char curref[42], curref2[42], refid[128], refid2[128];
for(int jj=0;jj<128;jj++)
{
((unsigned int*)Stor0mv)[jj] = (unsigned int)read_counter();
((unsigned int*)Stor1mv)[jj] = (unsigned int)read_counter();
refid[jj] = (signed char)read_counter();
refid2[jj] = (signed char)read_counter();
}

MV *pCurMV = pCurMV0+12, *pMVL1 = pMVL11+12;
MV *pLftCurmv=pCurMV-1, *pLftCurmv2=pMVL1-1, *pLftMV=Stor0mv+4, *pLftMV2=Stor1mv+4;
MV *pLftCurmvd = pLftCurmv, *pLftMVd=pLftMV;
signed char *pLftCurRf=curref+4, *pLftRf=refid+4, *pLftCurRf2=curref2+4, *pLftRf2=refid2+4;
int lft_mb_fldg = 0, mv_step = 8, mvstp2[2] = {16,16}, ref_step=4, refstp2[2]={16,16};

for(int idxnowt=0; idxnowt<8; idxnowt+=2)
{
pLftCurmv[0] = pLftMV[0];
pLftCurmv[0].dy <<= lft_mb_fldg; pLftCurmv += mv_step;
pLftMV += mvstp2[0];

pLftCurmv[0] = pLftMV[0];
pLftCurmv[0].dy <<= lft_mb_fldg; pLftCurmv += mv_step;
pLftMV += mvstp2[1];
//printf("lftMvAssign %10x %10x\n", ((u32*)(pLftCurmv-2*mv_step))[0],((u32*)(pLftCurmv-mv_step))[0]);
pLftCurRf[0] = pLftRf[0]; pLftCurRf[0] >>= lft_mb_fldg;
pLftCurRf += ref_step;
pLftRf += refstp2[1&(idxnowt>>1)];

//L1 mv and ref
pLftCurmv2[0] = pLftMV2[0];
pLftCurmv2[0].dy <<= lft_mb_fldg; pLftCurmv2 += mv_step;
pLftMV2 += mvstp2[0];

pLftCurmv2[0] = pLftMV2[0];
pLftCurmv2[0].dy <<= lft_mb_fldg; pLftCurmv2 += mv_step;
pLftMV2 += mvstp2[1];

pLftCurRf2[0] = pLftRf2[0]; pLftCurRf2[0] >>= lft_mb_fldg;
pLftCurRf2 += ref_step;
pLftRf2 += refstp2[1&(idxnowt>>1)];
}

printf("copyed %10x%10x%10x%10x%10x%10x\n", pLftCurmvd[mv_step*0],pLftCurmvd[mv_step*1],pLftCurmvd[mv_step*2],pLftCurmvd[mv_step*3],pLftCurmvd[mv_step*4],pLftCurmvd[mv_step*5],pLftCurmvd[mv_step*6],pLftCurmvd[mv_step*7]);
printf("orignl %10x%10x%10x%10x%10x%10x\n", pLftMVd[mvstp2[0]*0],pLftMVd[mvstp2[0]*1],pLftMVd[mvstp2[0]*2],pLftMVd[mvstp2[0]*3],pLftMVd[mvstp2[0]*4],pLftMVd[mvstp2[0]*5],pLftMVd[mvstp2[0]*6],pLftMVd[mvstp2[0]*7]);

This is a piece of a big software, I add the declaration and some printf, the printed values should be equal between two lines, when I compiled the upper program in a seperate small program, it is corrent, but in my big software, it is not.

Is it due to strict-aliasing optimization?

TimP
Black Belt
108 Views

Strict-aliasing defaults (protection against violation of that aspect of c and c++ standards) are intended to be the same for MSVC and ICL. Only if you set /Qansi-alias does ICL depend on this aspect of code correctness.

JenniferJ
Moderator
108 Views

This is more likea bug in the Intel C++ Compiler instead of compatibility.

is it possible to send a testcase?

Also make sure to use the latest Intel C++ compiler update. It should be 11.1.054. (just type "icl" to find out)

Thanks,

Jennifer

hurricanezhb
Beginner
108 Views

I do use the latest intel C++ compiler 11.1.054.

How to send a testcase?

The asm code piece generated for the upper c code is as follows in my big software (it is unlooped):

.B4.69: ; Preds .B4.68 .B4.67 ; Infreq
mov esi, DWORD PTR [6512+esp] ;4846.21
mov DWORD PTR [7524+esp], ebx ;
mov DWORD PTR [7060+esp], edi ;
mov edi, DWORD PTR [7160+esp] ;4846.21
lea eax, DWORD PTR [edi+esi] ;4846.21
mov esi, DWORD PTR [6580+esp] ;4846.21
lea ecx, DWORD PTR [esi*4] ;4846.21
mov ebx, ecx ;4846.21
neg ebx ;4846.21
mov DWORD PTR [6584+esp], ecx ;4846.21
add eax, ebx ;4846.21
movzx edx, WORD PTR [-4+eax+ecx] ;4846.21
mov DWORD PTR [6588+esp], ebx ;4846.21
mov ebx, DWORD PTR [7140+esp] ;4846.6
mov WORD PTR [-4+ebx], dx ;4846.6
movzx eax, WORD PTR [-2+eax+ecx] ;4846.21
mov ecx, DWORD PTR [6784+esp] ;4847.6
shl eax, cl ;4847.6
mov WORD PTR [-2+ebx], ax ;4847.6
movzx edx, WORD PTR [-4+edi+esi*4] ;4850.21
mov WORD PTR [28+ebx], dx ;4850.6
mov edx, DWORD PTR [7156+esp] ;4854.21
movzx edi, WORD PTR [-2+edi+esi*4] ;4851.6
shl edi, cl ;4851.6
mov WORD PTR [30+ebx], di ;4851.6
mov edi, DWORD PTR [7136+esp] ;4854.32
mov ebx, DWORD PTR [6576+esp] ;4856.6
movsx eax, BYTE PTR [-1+edx] ;4854.21
sar eax, cl ;4854.32
mov BYTE PTR [-1+edi], al ;4854.32
mov edi, DWORD PTR [6512+esp] ;4859.22
lea eax, DWORD PTR [-1+ebx+edx] ;4856.6
mov edx, DWORD PTR [7152+esp] ;4859.22
mov ebx, DWORD PTR [7132+esp] ;4859.6
mov DWORD PTR [6592+esp], eax ;4856.6
add edi, edx ;4859.22
mov edx, DWORD PTR [6584+esp] ;4859.22
add edi, DWORD PTR [6588+esp] ;4859.22
movzx eax, WORD PTR [-4+edi+edx] ;4859.22
mov WORD PTR [-4+ebx], ax ;4859.6
movzx edi, WORD PTR [-2+edi+edx] ;4859.22
shl edi, cl ;4860.6
mov edx, DWORD PTR [7152+esp] ;4863.22
mov WORD PTR [-2+ebx], di ;4860.6
movzx eax, WORD PTR [-4+edx+esi*4] ;4863.22
mov WORD PTR [28+ebx], ax ;4863.6
mov eax, DWORD PTR [7160+esp] ;4846.21
movzx edi, WORD PTR [-2+edx+esi*4] ;4864.6
shl edi, cl ;4864.6
mov WORD PTR [30+ebx], di ;4864.6
mov edi, DWORD PTR [7148+esp] ;4867.22
mov ebx, DWORD PTR [7128+esp] ;4867.34
movsx edx, BYTE PTR [-1+edi] ;4867.22
sar edx, cl ;4867.34
mov BYTE PTR [-1+ebx], dl ;4867.34
mov ebx, DWORD PTR [6576+esp] ;4869.6
mov edx, DWORD PTR [6508+esp] ;4846.21
lea edi, DWORD PTR [-1+ebx+edi] ;4869.6
mov DWORD PTR [6596+esp], edi ;4869.6
add edx, eax ;4846.21
add edx, DWORD PTR [6588+esp] ;4846.21
mov edi, DWORD PTR [7140+esp] ;4846.6
movzx ebx, WORD PTR [-4+edx+esi*8] ;4846.21
mov WORD PTR [60+edi], bx ;4846.6
movzx ebx, WORD PTR [-2+edx+esi*8] ;4846.21
shl ebx, cl ;4847.6
mov WORD PTR [62+edi], bx ;4847.6
movzx edx, WORD PTR [-4+eax+esi*4] ;4850.21
mov ebx, DWORD PTR [6592+esp] ;4854.21
mov WORD PTR [92+edi], dx ;4850.6
movzx eax, WORD PTR [-2+eax+esi*4] ;4851.6
shl eax, cl ;4851.6
mov WORD PTR [94+edi], ax ;4851.6
mov edi, DWORD PTR [7136+esp] ;4854.32
mov eax, DWORD PTR [6508+esp] ;4859.22
movsx edx, BYTE PTR [ebx] ;4854.21
sar edx, cl ;4854.32
add ebx, DWORD PTR [7460+esp] ;4856.6
mov DWORD PTR [6592+esp], ebx ;4856.6
mov ebx, DWORD PTR [7152+esp] ;4859.22
mov BYTE PTR [3+edi], dl ;4854.32
mov edi, DWORD PTR [7132+esp] ;4859.6
add eax, ebx ;4859.22
add eax, DWORD PTR [6588+esp] ;4859.22
movzx edx, WORD PTR [-4+eax+esi*8] ;4859.22
mov WORD PTR [60+edi], dx ;4859.6
movzx edx, WORD PTR [-2+eax+esi*8] ;4859.22
shl edx, cl ;4860.6
mov WORD PTR [62+edi], dx ;4860.6
movzx eax, WORD PTR [-4+ebx+esi*4] ;4863.22
mov WORD PTR [92+edi], ax ;4863.6
movzx ebx, WORD PTR [-2+ebx+esi*4] ;4864.6
shl ebx, cl ;4864.6
mov WORD PTR [94+edi], bx ;4864.6
mov ebx, DWORD PTR [6596+esp] ;4867.22
movsx eax, BYTE PTR [ebx] ;4867.22
sar eax, cl ;4867.34
add ebx, DWORD PTR [7460+esp] ;4869.6
mov edi, DWORD PTR [7128+esp] ;4867.34
mov DWORD PTR [6596+esp], ebx ;4869.6
mov ebx, DWORD PTR [7140+esp] ;4846.6
mov BYTE PTR [3+edi], al ;4867.34
mov edi, DWORD PTR [7160+esp] ;4846.21
mov eax, DWORD PTR [6504+esp] ;4846.21
lea edx, DWORD PTR [edi+eax] ;4846.21
mov edi, DWORD PTR [6584+esp] ;4846.21
lea edi, DWORD PTR [edi+edi*2] ;4846.21
add edx, DWORD PTR [6588+esp] ;4846.21
movzx eax, WORD PTR [-4+edi+edx] ;4846.21
mov WORD PTR [124+ebx], ax ;4846.6
movzx edx, WORD PTR [-2+edi+edx] ;4846.21
shl edx, cl ;4847.6
mov WORD PTR [126+ebx], dx ;4847.6
mov edx, DWORD PTR [7160+esp] ;4850.21
movzx eax, WORD PTR [-4+edx+esi*4] ;4850.21
mov WORD PTR [156+ebx], ax ;4850.6
movzx eax, WORD PTR [-2+edx+esi*4] ;4851.6
shl eax, cl ;4851.6
mov WORD PTR [158+ebx], ax ;4851.6
mov ebx, DWORD PTR [6592+esp] ;4854.21
mov eax, DWORD PTR [7152+esp] ;4859.22
movsx edx, BYTE PTR [ebx] ;4854.21
sar edx, cl ;4854.32
mov ebx, DWORD PTR [7136+esp] ;4854.32
mov BYTE PTR [7+ebx], dl ;4854.32
mov edx, DWORD PTR [6504+esp] ;4859.22
mov ebx, DWORD PTR [7132+esp] ;4859.6
add edx, eax ;4859.22
add edx, DWORD PTR [6588+esp] ;4859.22
movzx eax, WORD PTR [-4+edx+edi] ;4859.22
mov WORD PTR [124+ebx], ax ;4859.6
movzx edi, WORD PTR [-2+edx+edi] ;4859.22
shl edi, cl ;4860.6
mov eax, DWORD PTR [7152+esp] ;4863.22
mov WORD PTR [126+ebx], di ;4860.6
movzx edi, WORD PTR [-4+eax+esi*4] ;4863.22
mov WORD PTR [156+ebx], di ;4863.6
mov edi, DWORD PTR [7128+esp] ;4867.34
movzx edx, WORD PTR [-2+eax+esi*4] ;4864.6
shl edx, cl ;4864.6
mov WORD PTR [158+ebx], dx ;4864.6
mov edx, esi ;4846.21
mov ebx, DWORD PTR [6596+esp] ;4867.22
movsx eax, BYTE PTR [ebx] ;4867.22
sar eax, cl ;4867.34
mov ebx, DWORD PTR [7160+esp] ;4846.21
shl edx, 4 ;4846.21
mov BYTE PTR [7+edi], al ;4867.34
mov eax, DWORD PTR [6500+esp] ;4846.21
add eax, ebx ;4846.21
mov ebx, DWORD PTR [7140+esp] ;4846.6
add eax, DWORD PTR [6588+esp] ;4846.21
movzx edi, WORD PTR [-4+eax+edx] ;4846.21
mov WORD PTR [188+ebx], di ;4846.6
movzx edi, WORD PTR [-2+eax+edx] ;4846.21
shl edi, cl ;4847.6
mov WORD PTR [190+ebx], di ;4847.6
mov edi, DWORD PTR [7160+esp] ;4850.21
movzx eax, WORD PTR [-4+edi+esi*4] ;4850.21
mov WORD PTR [220+ebx], ax ;4850.6
movzx eax, WORD PTR [-2+edi+esi*4] ;4851.6
shl eax, cl ;4851.6
mov edi, DWORD PTR [6592+esp] ;4854.21
mov WORD PTR [222+ebx], ax ;4851.6
mov ebx, DWORD PTR [6576+esp] ;4854.21
movsx eax, BYTE PTR [ebx+edi] ;4854.21
sar eax, cl ;4854.32
mov ebx, DWORD PTR [7136+esp] ;4854.32
mov edi, DWORD PTR [6500+esp] ;4859.22
mov BYTE PTR [11+ebx], al ;4854.32
mov eax, DWORD PTR [7152+esp] ;4859.22
mov ebx, DWORD PTR [7132+esp] ;4859.6
add edi, eax ;4859.22
add edi, DWORD PTR [6588+esp] ;4859.22
movzx eax, WORD PTR [-4+edx+edi] ;4859.22
mov WORD PTR [188+ebx], ax ;4859.6
movzx edx, WORD PTR [-2+edx+edi] ;4859.22
shl edx, cl ;4860.6
mov eax, DWORD PTR [7152+esp] ;4863.22
mov WORD PTR [190+ebx], dx ;4860.6
movzx edi, WORD PTR [-4+eax+esi*4] ;4863.22
mov WORD PTR [220+ebx], di ;4863.6
mov edi, DWORD PTR [6576+esp] ;4867.22
movzx esi, WORD PTR [-2+eax+esi*4] ;4864.6
shl esi, cl ;4864.6
mov WORD PTR [222+ebx], si ;4864.6
mov esi, DWORD PTR [6596+esp] ;4867.22
movsx edx, BYTE PTR [esi+edi] ;4867.22
sar edx, cl ;4867.34
mov ecx, DWORD PTR [7128+esp] ;4867.34
mov esi, DWORD PTR [6564+esp] ;4873.28
mov edi, DWORD PTR [7140+esp] ;4874.5
mov BYTE PTR [11+ecx], dl ;4867.34
mov ecx, DWORD PTR [6988+esp] ;4873.42
movsx eax, BYTE PTR [-1+esi] ;4873.28
sar eax, cl ;4873.42
mov edx, DWORD PTR [7136+esp] ;4873.5
mov esi, DWORD PTR [6572+esp] ;4874.26
mov BYTE PTR [-5+edx], al ;4873.5
movzx eax, WORD PTR [-4+esi] ;4874.26
mov WORD PTR [-36+edi], ax ;4874.5
mov eax, DWORD PTR [6560+esp] ;4876.27
movzx edx, WORD PTR [-2+esi] ;4874.26
shl edx, cl ;4875.5
mov esi, DWORD PTR [7128+esp] ;4876.5
mov WORD PTR [-34+edi], dx ;4875.5
movsx eax, BYTE PTR [-1+eax] ;4876.27
sar eax, cl ;4876.42
mov BYTE PTR [-5+esi], al ;4876.5
mov esi, DWORD PTR [6568+esp] ;4877.25
movzx edx, WORD PTR [-4+esi] ;4877.25
mov WORD PTR [-36+ebx], dx ;4877.5
movzx eax, WORD PTR [-2+esi] ;4877.25
shl eax, cl ;4878.5
cmp DWORD PTR [6780+esp], 0 ;4887.8
mov ecx, DWORD PTR [6572+esp] ;4881.39
mov WORD PTR [-34+ebx], ax ;4878.5
movdqa xmm0, XMMWORD PTR [ecx] ;4881.39
movdqa XMMWORD PTR [-32+edi], xmm0 ;4882.39
mov edi, DWORD PTR [6564+esp] ;4883.44
movzx eax, WORD PTR [edi] ;4883.44
movsx edx, al ;4883.21
mov edi, DWORD PTR [7136+esp] ;4883.21
mov WORD PTR [-4+edi], ax ;4883.21
movdqa xmm1, XMMWORD PTR [esi] ;4884.40
mov esi, DWORD PTR [7128+esp] ;4886.20
mov edi, DWORD PTR [7060+esp] ;4887.8
movdqa XMMWORD PTR [-32+ebx], xmm1 ;4885.38
mov ebx, DWORD PTR [6560+esp] ;4886.43
movzx eax, WORD PTR [ebx] ;4886.43
mov ebx, DWORD PTR [7524+esp] ;4887.8
mov WORD PTR [-4+esi], ax ;4886.20
movsx eax, al ;4886.20
je .B4.71 ; Prob 50% ;4887.8

JenniferJ
Moderator
108 Views

Please follow the instructions here to upload files.

Alsotry to eliminate the optimizations one by one and see if you could find the option flag that will cause the problem.

Thanks,

Jennifer

Reply