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Execute FPGA openCL sample in Devcloud

yyjpro
New Contributor I
914 Views

I want to test the FPGA OpenCL code on devcloud, but I encountered the problem that the emulation compilation result does not match the hardware compilation result. Here is my sample code.

Here is the flow of my FPGA hardware host compilation, and I referenced this post for the compilation:

dpcpp helloworld.c -o helloworld.out -lOpenCL -lm -I/opt/intel/inteloneapi/compiler/latest/linux/include/sycl/

 Kernel compilation is in the form of batch job:

#!/bin/bash
aoc -c helloworld.cl -o helloworld.aocx

 which submitted to the FPGA compilation node:

qsub -l nodes=1:fpga_compile:ppn=2 -d . job.sh

run on the execution node:

qsub -I -l nodes=1:fpga_runtime:arria10:ppn=2 -d .

 Execution gives the following error result:

yyjpro_0-1646043641220.png

But the emulator's result is correct:

yyjpro_1-1646043697768.png

I tried to compile and execute using a different FPGA node, but each time I got a different error result.

source /data/intel_fpga/devcloudLoginToolSetup.sh
devcloud_login

yyjpro_2-1646044068392.png

So what's the reason, thanks!

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6 Replies
BoonBengT_Intel
Moderator
843 Views

Hi @yyjpro,

 

Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.
We did managed to saw the mention behavior, and do notice that the kernel compilation are having some error where removing the -c param fixed it.
Allow us to check on the code to understand further, and just to align, what is the code trying to do here?
Hope to hear from you soon.

 

Best Wishes
BB

yyjpro
New Contributor I
815 Views

Hi @BoonBengT_Intel ,

Thank you for your reply.

I want to learn and test oneAPI FPGA DPC++ project. I think OpenCL for FPGA project can help me better understand DPC++, so I wrote some FPGA OpenCL programs to test in DevCloud, but I encountered the above problems.

Thank you for helping me check this problem. And I removed the - c option and still output the following wrong results.

yyjpro_0-1647433291760.png

 

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BoonBengT_Intel
Moderator
774 Views

Hi @yyjpro,


Apologies for the delayed in response, as looking through the code mu guess is it might not be accordingly to the required guideline.

For that I would suggest to look into the example below for OpenCL with FPGA on devcloud to compile and run it:

- https://github.com/intel/FPGA-Devcloud/tree/master/main/QuickStartGuides/OpenCL_Program_PAC_Quickstart/Stratix%2010

Hope that clarify.


Best Wishes

BB


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BoonBengT_Intel
Moderator
747 Views

Hi @yyjpro,


Good day, just checking in to see if there is any further doubts in regards to this matter.

Hope we have clarify your doubts.


Best Wishes

BB


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yyjpro
New Contributor I
738 Views

Hi @BoonBengT_Intel 

I think I can solve this problem on other servers, so there is no problem. Thanks!

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BoonBengT_Intel
Moderator
732 Views

Hi @yyjpro,


Great! Good to know that it is working now, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread.

Thank you for the questions and as always pleasure having you here.


Best Wishes

BB


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