[FPGA] How to specify the right seed for my design

[giulio2]

Hello everyone,

I'm trying to compile a project on FPGA board intel arria 10 GX, however I encountered the following error:

Building target for FPGA hardware
Error: The fitter failed to successfully route the design. You may be able get this design to route by making design modifications.
Error: You can also try to fit your design by using different seed with flag -Xsseed=<S>

Error: You can also try using the high-effort compile flag -Xshigh-effort

For more details, full Quartus compile output can be found in files quartuserr.tmp and quartus_sh_compile.log.
Error: Compiler Error, not able to generate hardware

llvm-foreach:
dpcpp: error: fpga compiler command failed with exit code 1 (use -v to see invocation)
make[3]: *** [main_fpga.fpga] Error 1
make[2]: *** [CMakeFiles/main_fpga.fpga.dir/all] Error 2
make[1]: *** [CMakeFiles/fpga.dir/rule] Error 2
make: *** [fpga] Error 2

and the following output message:

-- FPGA_BOARD was not specified.
Configuring the design to run on the default FPGA board intel_a10gx_pac:pac_a10 (Intel(R) PAC with Intel Arria(R) 10 GX FPGA).
Please refer to the README for information on board selection.
-- Configuring done
-- Generating done
-- Build files have been written to: /home/u145208/oneSQL-join-a10gx/build
[ 33%] Built target onesql
Scanning dependencies of target main_fpga.fpga
[ 66%] Building CXX object CMakeFiles/main_fpga.fpga.dir/main_fpga.cpp.o
[100%] Linking CXX executable main_fpga.fpga
warning: -reuse-exe file '/home/u145208/oneSQL-join-a10gx/build/main_fpga.fpga' not found; ignored
aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the oneAPI FPGA Optimization Guide for information on performance tuning applications for FPGAs.
Error (170143): Final fitting attempt was unsuccessful
Error: An error occurred during routing
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 674 warnings
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script compile_script.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script build/entry.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings
CMakeFiles/main_fpga.fpga.dir/build.make:95: recipe for target 'main_fpga.fpga' failed
CMakeFiles/Makefile2:104: recipe for target 'CMakeFiles/main_fpga.fpga.dir/all' failed
CMakeFiles/Makefile2:175: recipe for target 'CMakeFiles/fpga.dir/rule' failed
Makefile:157: recipe for target 'fpga' failed.

How can I set the right seed for my design without compiling it every time?

[RichardTanSY_Intel]

There is no so-called right or best seed when you try to fit your design. You only change the seed if your design do not meet the timing requirement by a small amount. It is best that you check the reason why the fitter fails in first place.

Another way you can try is to set the compiler optimization mode in the Assignment > Settings > Compiler settings. My recommendation is to use the Design Space Explorer (DSE) with different optimal project setting to see if the design will pass the fitter even with maximum placement effort. Else, you need to resolve any fitter error that arise first.

You may checkout the mode description below.

https://www.intel.com/content/www/us/en/docs/programmable/683664/19-3/apply-compiler-optimization-modes-and.html

[RichardTanSY_Intel]

I have yet to receive any response from you to the previous question/reply/answer that I have provided but I believed that I have answered your question. 

With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,

Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos and select the best solution.