if I want to do hardware analysis within one devcloud nodes, I was wondering where can I find the high-level architecture for intel devcloud? Like how FPGA and Host are connected, or it is not publishable?
To know more about Devcloud configuration and high level architecture of Devcloud, you can refer to the below link: https://devcloud.intel.com/oneapi/
Also, running the pbsnodes command will help you to understand available nodes and it's configuration. The status of each node will change dynamically with time to time.
We are assuming that the solution provided helped and would no longer be monitoring this issue. Please raise a new thread if you have further issues.