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Are there dV/dT power-up limitations in MAX V devices?

VLubo
Beginner
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Do MAX V CPLDs have a latch-up problem if the 3.3V power (VCCIO) is brought up very slowly? After it is raised to about 1V, the device develops a short circuit to ground both from VCCIO and from VCCINT.

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ChiaLing_T_Intel
Employee
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Hi,

 

Thank you for contacting Intel Community. For your information, Max V devices offer the hot-socketing feature without the need for external components or special design requirements. Max V devices are immune to latch-up when hot-socketing. For details, kindly refer to Max V device handbook:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-v/max5_handbook.pdf#page=81

 

Thank you

 

Regards,

Chia Ling

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