02-26-2019 07:54 AM
Hi , I recommend you to refer the power down and power up sequence in Arria 10 . And design the board with the recommendation given below in the document. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an692.pdf Regards, RS
02-26-2019 08:36 AM
03-11-2019 07:06 AM
Hi , Please check the page no 325 of the below document , in that VCCERAM is monitored by POR so the power cannot be taken out https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_handbook.pd...