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How do we send 2 failed Max10 FPGAs to Intel/Altera for diagnostic testing and failure analysis?

EWatt
Beginner
624 Views

We have been running prototype HW for many months.  After cycling power, our PWB no longer functions properly.  The problem has been isolated to the FPGA which can no longer be accessed via JTAG.

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3 Replies
ENg2
Beginner
144 Views

same question I have. Intel took away my IPS and direct me to this forum and I can't find any infor except this thread.

ENg2
Beginner
144 Views

I thought this forum is actively monitored but half a month has passed and yet I did not see a reply....

ShafiqY_Intel
Employee
144 Views

Hi EWatt,

 

We need to understand more about your Failed Max 10 device before you can send for diagnostic testing and failure analysis.

 

Did you have any failure symptoms? (get any error or warning in Quartus)

Did you checked the power for JTAG pin? (TCK, TMS, TDO, TDI n etc2) Any strange behavior?

 

Thanks.

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