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Hi everyone,
Thanks to the support of this community members I got to download and install the abovementioned tool and am about to start using it again in earnest. However, the licenses I have obtained through the "License Portal" do not seem to cover VHDL applications; any help that I could get in order to be able to jump this hurdle, please?
Thank you in anticipation for your help.
Victor
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Hi @ VictorILunga
This case is duplicate from forum # 06326316 on the same request. Therefore, I’m suggesting to close this Case and continue with Case# 06326316.
Thanks.
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
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Hi there,
Thank you for your last message.
I have been writing back to the emails and my last response is shown further below.
The last email of early this morning sent to me at 01:33 (License L-1202938) I received, instructed me to request another License online, and I did that this morning about 03:00 am; and I am anxiously awaiting the license to be delivered to my email Box so I can progress the project. I completed that instruction earlier this morning about 03:00 am; so please help.
Thank you.
My last email sent to you via the private email:
Hi Rahman,
I have now managed to revisit my old stuff and found a CD of MAX+PLUS II Version 9.3, which I have installed on my machine. Upon running it and compiling the same module as I did then, I am getting this error as attached. It seems as though we are very close to getting a fully functional Development system here to help me progress this project. Please, help me with the license to clear this error as shown in the attached.
While examining the attached images, please note that these dialog boxes are generated as one compiles the VHDL Code (Clock_Div), clicking on the first dialog box, which leads to the second, and then the 3rd. The time stamp in the respective name of each file can help establish the sequence (order of succession).
Many thanks for your anticipated help.
V.
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Hi there,
I followed the instructions in the last email I received by making the online request for a new License, but I have not received the license file as yet. Please, help.
Kind regards
V.

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