Write a VHDL code to design a universal binary counter
Assign the I/O ports to the boards I/O pins as follows: Design I/O port Board I/O pin
Count up (up)
G_LED (3 downto 0)
V_SW(5 downto 2)
Synthesize the circuit and upload it to the FPGA prototyping board.
Verify the operation of counter.
Hint: you will need to slow down the main clock frequency (50MHZ) to see the LEDs blinking pattern. Use cycle counter to control the counter operations.
Max Count = Max Frequency/Desired Frequency
There are few links from Intel providing design example for counter as below:
Else, you can also search for 3rd party design and modify per your usage.
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