Hellocould somebody help me? I need to interface the adv7181B (with an YCbCr 4:2:2) with the Clocked Video Input function, but I have no idea about the settings I have to use. I think that i need to load the PAL presets, but the output from the adv is 8bit wide, the CVI needs 10bit. I've tried to put the V_sync and H_sync on the same bus, but it doesn't seem to work. Any hint, please?
Currently, I set CVI as 8 bit and embedded sync format.I've set vid_datavalid as vcc, but all that i get is onle a black screen. So, i've tryed to set CVI as 8 bit and separate sync format, but still, using vid_datavalid as vcc it does't work. Output from the video conerter, in 4:2:2 YCbCr there are only TD_DATA[7..0] TD_HS TD_VS TD_RESET TD_CLOCK (@27MHz) I REALLY don't know how to interface them correctly with the CVI. Any hint wold be precious..
I think "Vid_datavalid" should be conncet to a pin that is low level when Vertical Blanking Interval,and hight when signal is valid.Just like PIN "RTS" in SAA7113.
@Phate,May I ask how you have solved this problem? When I use the Test Pattern Generator (YCbCr, 8 bit, 4:2:2, Interlaced, Sequential) I get a correct image on the screen, so all the components between the generator and the VCO are correct. When I attach the TV Decoder, i just get a black (or grey) image, with a correct sync on the screen (well, most of the times). I use the following signals with embedded sync signals: TD_CLK TD_DATA TD_RESET vid_locked and vid_datavalid are tied to VCC. Is this correct? Any help would be appreciated!
Hi,right now, I don't remember how I did; there should be a couple of posts in this forum where other users helped me. If I find them, I link them. Anyway, I should have sources at home. Phate.