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Honored Contributor I
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Altera Monitor No Longer Connects After Restart

I'm using Altera Monitor 15.0 with a Terasic DE2-115 development board on Windows 10. 

 

Altera Monitor will no longer connect to my board. I can download a system onto the board but compiling and uploading a program fails. I'm using the stock DE2_Basic_Computer without any changes. I've tried programming in Altera Monitor and through Quartus by uploading the NiosII files to the EPCS64. I have tried this process with both basic computer and media computer - both using the stock files. 

 

This system setup as described above was initially working fine. After closing Altera Monitor and returning to work later, I have the problem described above. Below is a copy of the Altera Monitor Info & Errors window from the point of system download to error after compilation attempt. I also noted an error saying that the system couldn't run because of little-endian/big-endian conflict. I was unable to recreate this message for this post. 

 

NOTE (1): I believe I had the same problem the other day. Thinking that a system file got corrupt, I purged all Altera software from my computer and reinstalled, which fixed the problem. But there has to be a better solution than re-installation. 

NOTE (2): The C program I'm trying to run is also below 

 

UPDATE: I've since tried using Altera Monitor in a brand new Windows 7 installation on the same machine (I dual booted to a second hard drive) to no avail. Furthermore, I can upload custom VHDL compilations in Quartus to the EPCS module and everything works correctly. I can also install a NiosII processor on a DE0-Nano and that working in Altera Monitor. I'm also unable to connect to the DE2-115 through the Nios II EDS - I get the same error. 

 

C:/altera/15.0/quartus/bin64/quartus_pgm -c "USB-Blaster [USB-0]" --auto 

1) USB-Blaster [USB-0] 

020F70DD EP3C120/EP4CE115 

Info: ******************************************************************* 

Info: Running Quartus II 64-Bit Programmer 

Info: Version 15.0.0 Build 145 04/22/2015 SJ Web Edition 

Info: Copyright (C) 1991-2015 Altera Corporation. All rights reserved. 

Info: Your use of Altera Corporation's design tools, logic functions  

Info: and other software and tools, and its AMPP partner logic  

Info: functions, and any output files from any of the foregoing  

Info: (including device programming or simulation files), and any  

Info: associated documentation or information are expressly subject  

Info: to the terms and conditions of the Altera Program License  

Info: Subscription Agreement, the Altera Quartus II License Agreement, 

Info: the Altera MegaCore Function License Agreement, or other  

Info: applicable license agreement, including, without limitation,  

Info: that your use is for the sole purpose of programming logic  

Info: devices manufactured by Altera and sold by Altera or its  

Info: authorized distributors. Please refer to the applicable  

Info: agreement for further details. 

Info: Processing started: Sat Oct 31 13:53:12 2015 

Info: Command: quartus_pgm -c "USB-Blaster [USB-0]" -m jtag -o P;C:/altera/15.0/University_Program/Computer_Systems/DE2-115/DE2-115_Basic_Computer/verilog/DE2_115_Basic_Computer.sof@1 

Info (213045): Using programming cable "USB-Blaster [USB-0]" 

Info (213011): Using programming file C:/altera/15.0/University_Program/Computer_Systems/DE2-115/DE2-115_Basic_Computer/verilog/DE2_115_Basic_Computer.sof with checksum 0x00C6516D for device EP4CE115F29@1 

Info (209060): Started Programmer operation at Sat Oct 31 13:53:14 2015 

Info (209016): Configuring device index 1 

Info (209017): Device 1 contains JTAG ID code 0x020F70DD 

Info (209007): Configuration succeeded -- 1 device(s) configured 

Info (209011): Successfully performed operation(s) 

Info (209061): Ended Programmer operation at Sat Oct 31 13:53:21 2015 

Info: Quartus II 64-Bit Programmer was successful. 0 errors, 0 warnings 

Info: Peak virtual memory: 266 megabytes 

Info: Processing ended: Sat Oct 31 13:53:21 2015 

Info: Elapsed time: 00:00:09 

Info: Total CPU time (on all processors): 00:00:01 

nios2-elf-gcc -g -O1 -ffunction-sections -fverbose-asm -fno-inline -mno-cache-volatile -mno-hw-mul -mno-hw-div -I"C:/altera/15.0/nios2eds/components/altera_nios2/HAL/inc" -DSYSTEM_BUS_WIDTH=32 -DALT_SINGLE_THREADED -D_JTAG_UART_BASE=268439552u -Wl,--defsym -Wl,nasys_stack_top=0x8000000 -Wl,--defsym -Wl,nasys_program_mem=0x0 -Wl,--defsym -Wl,nasys_data_mem=0x0 -Wl,--section-start -Wl,.exceptions=0x20 -Wl,--section-start -Wl,.reset=0x0 -Wl,--script="C:/altera/15.0/University_Program/Monitor_Program/build/nios_cpp_build.ld" -o "D:/Keith/Documents/Module4.elf" "D:/Keith/Documents/School/ODU/ECE484W/Module4.cpp" "C:/altera/15.0/University_Program/Monitor_Program/lib/jtag_uart.c"  

ELF generated at D:/Keith/Documents/Module4.elf. 

nios2-elf-objcopy -O srec "D:/Keith/Documents/Module4.elf" "D:/Keith/Documents/Module4.srec"  

SREC generated at D:/Keith/Documents/Module4.srec. 

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 

Resetting and pausing target processor: FAILED 

Leaving target processor paused 

 

# define COUNT 1000 # define SERIAL_PORT 0x10001010 # define SEVEN_SEGMENT_PORT 0x10000020 /* // Gets an integer from the serial data register and returns an int result */ int getInt(){ volatile int * serial_ptr = (int *) SERIAL_PORT; volatile int serialData = 0; volatile int data = 0; volatile int counter = COUNT; bool found = false; while(!found){ // Block until Serial Data Available serialData = *(serial_ptr); // Get Byte 3 if (serialData & 0x00008000){ // Check for new data found = true; } // Delay counter counter = COUNT; while(counter>0){counter--;} } data = serialData & 0xFF; // Store Byte 3 data = data << 8; serialData = *(serial_ptr); // Get Byte 2 data += serialData & 0xFF; // Store Byte 2 data = data << 8; serialData = *(serial_ptr); // Get Byte 1 data += serialData & 0xFF; // Store Byte 1 data = data << 8; serialData = *(serial_ptr); // Get Byte 0 data += serialData & 0xFF; // Store Byte 0 return data; } /* // Converts an integer into a 4 section 7-segment display. Capable of values -999 to 999 */ int intTo7Seg(volatile int &input){ // Active high 7-segment display LUT volatile char digits = {0b0111111, 0b0000110, 0b1011011, 0b1001111, 0b1100110, 0b1101101, 0b1111101, 0b0000111, 0b1111111, 0b1100111, 0b1000000}; volatile char hundreds = 0; volatile char tens = 0; volatile int output = 0; // Checks for negative value if (input & 0x80000000){ // Two's Complement Input input = ~input; input++; // Store "-" in Left most segment output += digits; output = output << 8; } // Separate "Hundreds" place from integer value hundreds = input / 100; input = input % 100; // Separate "Tens" place from integer value tens = input / 10; input = input % 10; // Store 7-Segment values by integer into output output += digits; output = output << 8; output += digits; output = output << 8; output += digits; return output; } /* // Program main */ int main(){ volatile int * seven_seg_LED = (int *) SEVEN_SEGMENT_PORT; volatile int brightness = 0; while(1){ // Get Brightness Value from Serial brightness = getInt(); // Update 7-Segment Display *(seven_seg_LED) = intTo7Seg(brightness); } }
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