Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
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Cyclone II starter dev kit,DE1, Audio HELP!

Honored Contributor II

Hi Everyone,  


I'm using the DE1 FPGA board. I'm trying to pass a signal from the mic to the speaker using the UP IP. The zip file and related pdf can be found here:  


I was successful in putting this in the provided reference design.  


:confused: Problem: The fifospace is always empty and cannot be enabled. This creates further problems b/c then the mic isn't reading into the ADC buffer.  

We also need to write to the speakers.  


Command used for mic: alt_up_audio_read_left_channel() 

Command used for the speaker: alt_up_audio_write_left_channel 


The problem appears not to be with the code. 


If anyone can help me, that would be awesome! :D
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Honored Contributor II

Hi! I am having the same problem . Can you revert back with the solution you found .

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