Intel® FPGA University Program
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DMA's Front and Back Buffer Address Translator

Altera_Forum
Honored Contributor II
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Hi Friends, 

 

I want to use the "DMA's Front and Back Buffer Address Translator " IP core, but i can't find the description of the register map of it. 

Does anyone have imformation about this? Any help would be greatly appreciated. 

 

Best Regards.
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